This book introduces the basic features and capabilities of IEEE Std. 1364- 2001/2005 Verilog HDL. It can be used as a reference for Verilog HDL. The most important features of this book are as follows. Abundant examples: A lot of worked examples and abundant review questions are provided in each section for readers to test their understanding of the related topics. Abundant end-of-chapter problems: Plentiful end-of-chapter problems are included in each chapter to provide readers more opportunities to practice what they learn from the chapter. Highlighting Verilog HDL syntax: The Verilog HDL syntax introduced in the book is highlighted to make it distinguishable from the text. This is proved much helpful for the reader to refer the desired syntax later as he needs. Bolded keywords in Verilog HDL modules: All keywords in Verilog HDL modules throughout the book are bolded to emphasize the language structures and improve the readability of the module"