Cantitate/Preț
Produs

Applied Formal Verification

Autor Douglas Perry, Harry Foster
en Limba Engleză Hardback – 16 mai 2005
Publisher's Note: Products purchased from Third Party sellers are not guaranteed by the publisher for quality, authenticity, or access to any online entitlements included with the product.


Formal Verification, ASAP
Applied Formal Verification delivers right-now methods for integrating this powerful tool into your design process. Written by two of the field's leaders, this tutorial opens shortcuts to the concept-proving, efficiency-boosting benefits of formal verification. The book includes real-world examples of formal verification applied to complex designs and clarifying explanations of high-level requirement writing. If you've some knowledge of Verilog or VHDL and simulation verification, you're ready to build your real-world problem-solving skills with this potent guide to formal verification.

APPLY FORMAL VERIFICATION NOW
Simulation-based verification * Introduction to formal techniques * Contrasting simulation and formal techniques * Developing a formal test plan * Writing high-level requirements * Proving high-level requirements * System-level simulation * Final system simulation * PSL tables * SystemVerilog assertions tables
Citește tot Restrânge

Preț: 65427 lei

Preț vechi: 68871 lei
-5% Nou

Puncte Express: 981

Preț estimativ în valută:
12521 12993$ 10465£

Carte tipărită la comandă

Livrare economică 20-25 martie

Preluare comenzi: 021 569.72.76

Specificații

ISBN-13: 9780071443722
ISBN-10: 007144372X
Pagini: 240
Dimensiuni: 155 x 231 x 24 mm
Greutate: 0.51 kg
Ediția:New.
Editura: McGraw Hill Education
Colecția McGraw-Hill
Locul publicării:United States

Cuprins

PREFACE

Chapter 1: Introduction to Verification

Chapter 2: Verification Process

Chapter 3: Current Verification Techniques

Chapter 4: Introduction to Formal Techniques

Chapter 5: Formal Basics and Definitions

Chapter 6: Property Specification

Chapter 7: The Formal Test Plan Process

Chapter 8: Techniques for Proving Properties

Chapter 9: Final System Simulation

APPENDIX A: IEEE 1850 PSL PROPERTY SPECIFICATION LANGUAGE

APPENDIX B: IEEE 1800 SYSTEM VERILOG ASSERTIONS

BIBLIOGRAPHY

INDEX