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Circuit Design for CMOS VLSI

Autor John P. Uyemura
en Limba Engleză Paperback – 5 noi 2011
During the last decade, CMOS has become increasingly attractive as a basic integrated circuit technology due to its low power (at moderate frequencies), good scalability, and rail-to-rail operation. There are now a variety of CMOS circuit styles, some based on static complementary con­ ductance properties, but others borrowing from earlier NMOS techniques and the advantages of using clocking disciplines for precharge-evaluate se­ quencing. In this comprehensive book, the reader is led systematically through the entire range of CMOS circuit design. Starting with the in­ dividual MOSFET, basic circuit building blocks are described, leading to a broad view of both combinatorial and sequential circuits. Once these circuits are considered in the light of CMOS process technologies, impor­ tant topics in circuit performance are considered, including characteristics of interconnect, gate delay, device sizing, and I/O buffering. Basic circuits are then composed to form macro elements such as multipliers, where the reader acquires a unified view of architectural performance through par­ allelism, and circuit performance through careful attention to circuit-level and layout design optimization. Topics in analog circuit design reflect the growing tendency for both analog and digital circuit forms to be combined on the same chip, and a careful treatment of BiCMOS forms introduces the reader to the combination of both FET and bipolar technologies on the same chip to provide improved performance.
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Specificații

ISBN-13: 9781461366096
ISBN-10: 1461366097
Pagini: 472
Ilustrații: 480 p. 2 illus.
Dimensiuni: 155 x 235 x 25 mm
Greutate: 0.65 kg
Ediția:Softcover reprint of the original 1st ed. 1992
Editura: Springer Us
Colecția Springer
Locul publicării:New York, NY, United States

Public țintă

Research

Cuprins

1 Introduction to CMOS.- 1.1 Why Study CMOS?.- 1.2 Basic Concepts.- 1.3 Plan of the Book.- 1.4 References.- 2 MOSFET Characteristics.- 2.1 Threshold Voltage.- 2.2 Current-Voltage Characteristics.- 2.3 p-Channel MOSFETs.- 2.4 MOSFET Capacitances.- 2.5 Junction Leakage Currents.- 2.6 Parasitic Resistances.- 2.7 Non-Rectangular MOSFET Gates.- 2.8 Mobility Variations.- 2.9 Subthreshold Current.- 2.10 Temperature Dependence.- 2.11 Scaling Theory.- 2.12 Short-Channel Effects.- 2.13 Narrow-Width Threshold Voltage.- 2.14 Hot Electrons.- 2.15 MOSFET Modelling in SPICE.- 2.16 References.- 3 The CMOS Inverter.- 3.1 Circuit Operation.- 3.2 Inverter Switching Characteristics.- 3.3 Output Capacitance.- 3.4 Secondary Parasitic Effects.- 3.5 Comparison with SPICE.- 3.6 Inverter Design.- 3.7 The Power-Delay Product.- 3.8 Temperature Dependence.- 3.9 References.- 4 Static Logic Circuits.- 4.1 General Structure.- 4.2 Series-Connected MOSFETs.- 4.3 NAND Gate.- 4.4 NOR Gate.- 4.5 Comparison of NAND and NOR Gates.- 4.6 OR and AND Gates.- 4.7 Combinational Logic.- 4.8 Exclusive-OR and Equivalence.- 4.9 Structural Variations.- 4.10 Tri-State Output.- 4.11 Pseudo-nMOS/pMOS Logic.- 4.12 Flip-Flops.- 4.13 Schmitt Trigger.- 4.14 References.- 5 CMOS Switch Logic.- 5.1 CMOS Transmission Gates.- 5.2 Transmission Gate Model.- 5.3 Layout Considerations.- 5.4 TG-Based Switch Logic Gates.- 5.5 Latches and Flip-Flops.- 5.6 Array Logic.- 5.7 Differential CVS Logic.- 5.8 Complementary Pass-Transistor Logic.- 5.9 DSL Logic.- 5.10 References.- 6 Chip Design.- 6.1 Isolation.- 6.2 CMOS Process Examples.- 6.3 Design Rules.- 6.4 Basic Layout.- 6.5 Interconnects.- 6.6 Data Transmission.- 6.7 Transmission Line Analysis.- 6.8 Crosstalk.- 6.9 Gate Arrays in CMOS.- 6.10 References.- 7 Synchronous Logic.- 7.1 Clock Signals.- 7.2 Clock Distribution and Skew.- 7.3 Clocked Static Logic.- 7.4 Charge Storage Nodes.- 7.5 Charge Leakage.- 7.6 Charge Sharing.- 7.7 Dynamic Logic.- 7.8 Domino Logic.- 7.9 Multiple-Output Domino Logic.- 7.10 Latched Domino Logic.- 7.11 NORA Logic.- 7.12 Zipper CMOS Logic.- 7.13 References.- 8 Design of Basic Circuits.- 8.1 Chip Floorplan.- 8.2 Input Protection Circuits.- 8.3 Static Gate Sizing.- 8.4 Off-Chip Driver Circuits.- 8.5 Timing and Clock Distribution.- 8.6 Memory Circuits.- 8.7 References.- 9 Analog CMOS Circuits.- 9.1 MOSFET Equations.- 9.2 Small-Signal MOSFET Model.- 9.3 Basic Amplifier.- 9.4 Voltage References.- 9.5 Current Sources.- 9.6 Differential Amplifier.- 9.7 A CMOS Operational Amplifier.- 9.8 Summary.- 9.9 References.- 10 BiCMOS Circuits.- 10.1 Bipolar Junction Transistors.- 10.2 BiCMOS Technology.- 10.3 BiCMOS Inverter.- 10.4 Comparison of CMOS and BiCMOS Performance.- 10.5 Circuit Variations.- 10.6 Logic Formation.- 10.7 Tri-state Output.- 10.8 Level Conversion.- 10.9 Summary.- 10.10 References.