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Engineering the Complex Soc: Fast, Flexible Design with Configurable Processors: Prentice Hall Modern Semiconductor Design Series' Sub Series

Autor Chris Rowen, Steve Leibson
en Limba Engleză Paperback – 31 mai 2004
A methodological breakthrough gives SoC designers and engineers the techniques they need to finish larger projects in less time.
  • Engineers can keep pace with the demand for increased productivity by employing new SoC techniques that traditional DSP methods would not allow for.
  • The first book to provide a unified hardware/software view of SoC design using the multi-processor system-on-chip or "sea-of processors" approach.
  • Written by the CEO of Tensilica- sharing his proven and successful design methodologies.
This book outlines a new, essential methodology for developing SoC hardware and software using configurable, extensible processor technology as a unifying theme. In addition to laying out a dramatically new SOC design methodology, the book introduces the concepts of processor configuration, extension, hardware/software co-generation and multiple processor partitioning and communication. It uses real-world examples extensively, both in the form of case studies about architecture decisions and in very short examples that communicate the flavor and the power of these methods. No other book discusses how to use multiple processors on a single chip to speed the chip design process and achieve faster performance. All other books that cover SoC design assume the traditional 1980's-style approach to system design that employs one central processor or, at most, one processor and a co-processor such as a digital signal processor (DSP) on a chip. Other books assume that if there are parts of the design that can't be run fast enough on the main system processor, then the designer must hand-code those parts of the design in hardware-description language (HDL) such as Verilog or VHDL. That was state-of-the-art thinking for chip design in the early 1990s, but as chip complexity increased and configurable, embedded processor cores were introduced and established, SoCs with multiple processors are proving to be an effective alternative.
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Specificații

ISBN-13: 9780131455375
ISBN-10: 0131455370
Pagini: 496
Dimensiuni: 184 x 242 x 24 mm
Greutate: 0.88 kg
Ediția:1
Editura: Prentice Hall
Seria Prentice Hall Modern Semiconductor Design Series' Sub Series

Locul publicării:Upper Saddle River, United States

Descriere

Engineering the Complex SOC
The first unified hardware/software guide to processor-centric SOC design
Processor-centric approaches enable SOC designers to complete far larger projects in far less time. Engineering the Complex SOCis a comprehensive, example-driven guide to creating designs with configurable, extensible processors. Drawing upon Tensilica’s Xtensa architecture and TIE language, Dr. Chris Rowen systematically illuminates the issues, opportunities, and challenges of processor-centric design.
Rowen introduces a radically new design methodology, then covers its essential techniques: processor configuration, extension, hardware/software co-generation, multiple processor partitioning/communication, and more. Coverage includes:
  • Why extensible processors are necessary: shortcomings of current design methods
  • Comparing extensible processors to traditional processors and hardwired logic
  • Extensible processor architecture and mechanisms of processor extensibility
  • Latency, throughput, coordination of parallel functions, hardware interconnect options, management of design complexity, and other issues
  • Multiple-processor SOC architecture for embedded systems
  • Task design from the viewpoints of software andhardware developers
  • Advanced techniques: implementing complex state machines, task-to-task synchronization, power optimization, and more
  • Toward a “sea of processors”: Long-term trends in SOC design and semiconductor technology
For all architects, hardware engineers, software designers, and SOC program managers involved with complex SOC design; and for all managers investing in SOC designs, platforms, processors, or expertise.
PRENTICE HALL
Professional Technical Reference
Upper Saddle River, NJ 07458
www.phptr.com

Cuprins

List of Figures.
Foreword by Clayton Christensen.
Foreword by John Hennessy.
Author’s Preface.
Acknowledgments.
1. The Case for a New SOC Design Methodology.
    The Age of Megagate SOCs.
    The Fundamental Trends of SOC Design.
    What’s Wrong with Today’s Approach to SOC Design?
    Preview: An Improved Design Methodology for SOC Design.
    Further Reading.
2. SOC Design Today.
    Hardware System Structure.
    Software Structure.
    Current SOC Design Flow.
    The Impact of Semiconductor Economics.
    Six Major Issues in SOC Design.
    Further Reading.
3. A New Look at SOC Design.
    Accelerating Processors for Traditional Software Tasks.
    Example: Tensilica Xtensa Processors for EEMBC Benchmarks.
    System Design with Multiple Processors.
    New Essentials of SOC Design Methodology.
    Addressing the Six Problems.
    Further Reading.
4. System-Level Design of Complex SOCs
    Complex SOC System Architecture Opportunities.
    Major Decisions in Processor-Centric SOC Organization.
    Communication Design = Software Mode + Hardware Interconnect.
    Hardware Interconnect Mechanisms.
    Performance-Driven Communication Design.
    The SOC Design Flow.
    Non-Processor Building Blocks in Complex SOC.
    Implications of Processor-Centric SOC Architecture.
    Further Reading.
5. Configurable Processors: A Software View.
    Processor Hardware/Software Cogeneration.
    The Process of Instruction Definition and Application Tuning.
    The Basics of Instruction Extension.
    The Programmer’s Model.
    Processor Performance Factors.
    Example: Tuning a Large Task.
    Memory-System Tuning.
    Long Instruction Words.
    Fully Automatic Instruction-Set Extension.
    Further Reading.
6. Configurable Processors: A Hardware View.
    Application Acceleration: A Common Problem.
    Introduction to Pipelines and Processors.
    Hardware Blocks to Processors.
    Moving from Hardwired Engines to Processors.
    Designing the Processor Interface.
    A Short Example: ATM Packet Segmentation and Reassembly.
    Novel Roles for Processors in Hardware Replacement.
    Processors, Hardware Implementation, and Verification Flow.
    Progress in Hardware Abstraction.
    Further Reading.
7. Advanced Topics in SOC Design.
    Pipelining for Processor Performance.
    Inside Processor Pipeline Stalls.
    Optimizing Processors to Match Hardware.
    Multiple Processor Debug and Trace.
    Issues in Memory Systems.
    Optimizing Power Dissipation in Extensible Processors.
    Essentials of TIE.
    Further Reading.
8. The Future of SOC Design: The Seaof Processors.
    Why Is Software Programmability So Central?
    Looking into the Future of SOC.
    Processor Scaling Model.
    Future Applications of Complex SOCs.
    The Future of the Complex SOC Design Process.
    The Future of the Industry.
    The Disruptive-Technology View.
    The Long View.
    Further Reading.
Index.

Notă biografică

About the Author
DR. CHRIS ROWEN is President, CEO, and Founder of Tensilica, a leader in the automatic generation of application-specific microprocessors for high-volume systems. He pioneered RISC architecture at Stanford, helped start MIPS Computer Systems, and served as VP/General Manager of the Design Reuse Group at Synopsys. He holds a Ph.D. in electrical engineering from Stanford.

Textul de pe ultima copertă

Engineering the Complex SOC The first unified hardware/software guide to processor-centric SOC design Processor-centric approaches enable SOC designers to complete far larger projects in far less time. Engineering the Complex SOCis a comprehensive, example-driven guide to creating designs with configurable, extensible processors. Drawing upon Tensilica's Xtensa architecture and TIE language, Dr. Chris Rowen systematically illuminates the issues, opportunities, and challenges of processor-centric design. Rowen introduces a radically new design methodology, then covers its essential techniques: processor configuration, extension, hardware/software co-generation, multiple processor partitioning/communication, and more. Coverage includes:
  • Why extensible processors are necessary: shortcomings of current design methods
  • Comparing extensible processors to traditional processors and hardwired logic
  • Extensible processor architecture and mechanisms of processor extensibility
  • Latency, throughput, coordination of parallel functions, hardware interconnect options, management of design complexity, and other issues
  • Multiple-processor SOC architecture for embedded systems
  • Task design from the viewpoints of software andhardware developers
  • Advanced techniques: implementing complex state machines, task-to-task synchronization, power optimization, and more
  • Toward a "sea of processors": Long-term trends in SOC design and semiconductor technology
For all architects, hardware engineers, software designers, and SOC program managers involved with complex SOC design; and for all managers investing in SOC designs, platforms, processors, or expertise. PRENTICE HALL
Professional Technical Reference
Upper Saddle River, NJ 07458
www.phptr.com