Abstraction Refinement for Large Scale Model Checking Integrated Circuits and Systems Autor Chao Wang et al. 20 iul 2006 Hardback Preț: 637.46 lei 749.95 lei 6-8 săpt. -15%
Logic Synthesis and Verification Algorithms Autor Gary D. Hachtel et al. 18 mar 2013 Paperback Preț: 601.40 lei 707.53 lei 6-8 săpt. -15%
Logic Minimization Algorithms for VLSI Synthesis The Springer International Series in Engineering and Computer Science, nr. 2 Autor Robert K. Brayton et al. 31 aug 1984 Hardback Preț: 1151.34 lei 1439.17 lei 6-8 săpt. -20%