Reuse Methodology Manual for System-On-A-Chip Designs
Autor Michael Keating, Pierre Bricauden Limba Engleză Hardback
These designers see current design tools and methodologies as inadequate for developing million-gate ASICs from scratch. There is considerable pressure to keep design team size and design schedules constant even as design complexities grow. Tools are not providing the productivity gains required to keep pace with the increasing gate counts available from deep submicron technology. Design reuse - the use of pre-designed and pre-verified cores - is the most promising opportunity to bridge the gap between available gate-count and designer productivity.
Reuse Methodology Manual for System-On-A-Chip Designs, Second Edition outlines an effective methodology for creating reusable designs for use in a System-on-a-Chip (SoC) design methodology. Silicon and tool technologies move so quickly that no single methodology can provide a permanent solution to this highly dynamic problem. Instead, this manual is an attempt to capture and incrementally improve on current best practices in the industry, and to give a coherent, integrated view of the design process. Reuse Methodology Manual for System-On-A-Chip Designs, Second Edition will be updated on a regular basis as a result of changing technology and improved insight into the problems of design reuse and its role in producing high-quality SoC designs.
Preț: 554.67 lei
Preț vechi: 652.55 lei
-15% Nou
Puncte Express: 832
Preț estimativ în valută:
106.21€ • 114.89$ • 88.50£
106.21€ • 114.89$ • 88.50£
Carte tipărită la comandă
Livrare economică 11-25 decembrie
Preluare comenzi: 021 569.72.76
Specificații
ISBN-13: 9780792385585
ISBN-10: 0792385586
Pagini: 286
Greutate: 0.62 kg
Ediția:Revised
ISBN-10: 0792385586
Pagini: 286
Greutate: 0.62 kg
Ediția:Revised
Cuprins
Foreword. Preface to the Second Edition. Acknowledgements. 1. Introduction. 2. The System-on-a-Chip Design Process. 3. System-Level Design Issues: Rules and Tools. 4. The Macro Design Process. 5. RTL Coding Guidelines. 6. Macro Synthesis Guidelines. 7. Macro Verification Guidelines. 8. Developing Hard Macros. 9. Macro Deployment: Packaging for Reuse. 10. System Integration with Reusable Macros. 11. System-Level Verification Issues. 12. Data and Project Management. 13. Implementing a Reuse Process. Bibliography.