The Regularized Fast Hartley Transform: Optimal Formulation of Real-Data Fast Fourier Transform for Silicon-Based Implementation in Resource-Constrained Environments: Signals and Communication Technology
Autor Keith Jonesen Limba Engleză Paperback – 5 mai 2012
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Specificații
ISBN-13: 9789400731783
ISBN-10: 9400731787
Pagini: 244
Ilustrații: XVII, 200 p.
Dimensiuni: 155 x 235 x 13 mm
Greutate: 0.35 kg
Ediția:2010
Editura: SPRINGER NETHERLANDS
Colecția Springer
Seria Signals and Communication Technology
Locul publicării:Dordrecht, Netherlands
ISBN-10: 9400731787
Pagini: 244
Ilustrații: XVII, 200 p.
Dimensiuni: 155 x 235 x 13 mm
Greutate: 0.35 kg
Ediția:2010
Editura: SPRINGER NETHERLANDS
Colecția Springer
Seria Signals and Communication Technology
Locul publicării:Dordrecht, Netherlands
Public țintă
Professional/practitionerCuprins
Background to Research.- Fast Solutions to Real-Data Discrete Fourier Transform.- The Discrete Hartley Transform.- Derivation of the Regularized Fast Hartley Transform.- Algorithm Design for Hardware-Based Computing Technologies.- Derivation of Area-Efficient and Scalable Parallel Architecture.- Design of Arithmetic Unit for Resource-Constrained Solution.- Computation of 2n-Point Real-Data Discrete Fourier Transform.- Applications of Regularized Fast Hartley Transform.- Summary and Conclusions.
Recenzii
From the reviews:
“The aim of the author is to present a design for a generic double-sized butterfly for use by the fast Hartley transform (FHT) of radix-4 length, which lends itself to parallelization and to mapping onto a regular computational structure for implementation with parallel computing technology. … The textbook is mainly written for students and researchers in engineering and computer science, who are interested in the design and implementation of parallel algorithms for real-data DFT and DHT.” (Manfred Tasche, Zentralblatt MATH, Vol. 1191, 2010)
“The aim of the author is to present a design for a generic double-sized butterfly for use by the fast Hartley transform (FHT) of radix-4 length, which lends itself to parallelization and to mapping onto a regular computational structure for implementation with parallel computing technology. … The textbook is mainly written for students and researchers in engineering and computer science, who are interested in the design and implementation of parallel algorithms for real-data DFT and DHT.” (Manfred Tasche, Zentralblatt MATH, Vol. 1191, 2010)
Textul de pe ultima copertă
When designing high-performance DSP systems for implementation with silicon-based computing technology, the oft-encountered problem of the real-data DFT is typically addressed by exploiting an existing complex-data FFT, which can easily result in an overly complex and resource-hungry solution. The research described in The Regularized Fast Hartley Transform: Optimal Formulation of Real-Data Fast Fourier Transform for Silicon-Based Implementation in Resource-Constrained Environments deals with the problem by exploiting directly the real-valued nature of the data and is targeted at those real-world applications, such as mobile communications, where size and power constraints play key roles in the design and implementation of an optimal solution. The Regularized Fast Hartley Transform provides the reader with the tools necessary to both understand the proposed new formulation and to implement simple design variations that offer clear implementational advantages, both practical and theoretical, over more conventional complex-data solutions to the problem. The highly-parallel formulation described is shown to lead to scalable and device-independent solutions to the latency-constrained version of the problem which are able to optimize the use of the available silicon resources, and thus to maximize the achievable computational density, thereby making the solution a genuine advance in the design and implementation of high-performance parallel FFT algorithms.
Caracteristici
Describes direct solution to real-data DFT targeted at those real-world applications, such as mobile communications, where resources are limited Achieving computational density of most advanced commercially-available solutions for greatly reduced silicon resources Yielding simple design variations that enable one to optimize use of available silicon resources with resulting designs being: scalable and device-independent Area-efficient with memory requirement reducible to theoretical minimum Includes supplementary material: sn.pub/extras