VLIW Microprocessor Hardware Design
Autor Lee Weng Fooken Limba Engleză Hardback – 16 oct 2007
Acquire the Design Information, Methods, and SkillsNeeded to Master the New VLIW Architecture!
VLIW Microprocessor Hardware Design offers you a complete guide to VLIW hardware design—providing state-of-the-art coverage of microarchitectures, RTL coding, ASIC flow, and FPGA flow of design. The book also contains a wide range of skills-building examples, all worked using Verilog, that equip you with a practical, hands-on tutorial for understanding each step in the VLIW microprocessor design process.
Written by Weng Fook Lee, an internationally renowned expert in the field of microprocessor design, this cutting-edge hardware design tool presents unsurpassed coverage of the latests in VLIW microprocessing. Authoritative and comprehensive, VLIW Microprocessor Hardware Design features:
- Step-by-step information on the VLIW hardware design process
- A wealth of Verilog-based designs
- ASIC and FPGA implementations
- Expert guidance on the best-known methods for RTL coding
- Over 75 detailed illustrations that clarify each aspect of VLIW design
• Introduction • Design Methodology • RTL Coding, Testbenching, and Simulation • FPGA Implementation • Testbenches and Simulation Results • Synthesis Results and Gate Level Netlist
Preț: 659.41 lei
Preț vechi: 963.90 lei
-32% Nou
Puncte Express: 989
Preț estimativ în valută:
126.21€ • 131.26$ • 105.76£
126.21€ • 131.26$ • 105.76£
Carte tipărită la comandă
Livrare economică 14-19 martie
Preluare comenzi: 021 569.72.76
Specificații
ISBN-13: 9780071497022
ISBN-10: 0071497021
Pagini: 219
Dimensiuni: 155 x 231 x 20 mm
Greutate: 0.49 kg
Editura: McGraw Hill Education
Colecția McGraw-Hill
Locul publicării:United States
ISBN-10: 0071497021
Pagini: 219
Dimensiuni: 155 x 231 x 20 mm
Greutate: 0.49 kg
Editura: McGraw Hill Education
Colecția McGraw-Hill
Locul publicării:United States
Cuprins
Chapter 1: Introduction
Chapter 2: Design Methodology
Chapter 3: RTL Coding, Testbenching, and Simulation
Chapter 4: FPGA Implementation
Appendix A: Testbenches and Simulation Results
Appendix B: Synthesis Results and Gate Level Netlist
Bibliography
Index
Chapter 2: Design Methodology
Chapter 3: RTL Coding, Testbenching, and Simulation
Chapter 4: FPGA Implementation
Appendix A: Testbenches and Simulation Results
Appendix B: Synthesis Results and Gate Level Netlist
Bibliography
Index