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Circuit Design for Reliability

Editat de Ricardo Reis, Yu Cao, Gilson Wirth
en Limba Engleză Paperback – 22 sep 2016
This book presents physical understanding, modeling and simulation, on-chip characterization, layout solutions, and design techniques that are effective to enhance the reliability of various circuit units.  The authors provide readers with techniques for state of the art and future technologies, ranging from technology modeling, fault detection and analysis, circuit hardening, and reliability management.
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Specificații

ISBN-13: 9781493941568
ISBN-10: 1493941569
Pagini: 272
Ilustrații: VI, 272 p. 190 illus., 132 illus. in color.
Dimensiuni: 155 x 235 mm
Ediția:Softcover reprint of the original 1st ed. 2015
Editura: Springer
Colecția Springer
Locul publicării:New York, NY, United States

Cuprins

Introduction.- Recent Trends in Bias Temperature Instability.- Charge trapping phenomena in MOSFETS: From Noise to Bias Temperature Instability.- Atomistic Simulations on Reliability.- On-chip characterization of statistical device degradation.- Circuit Resilience Roadmap.- Layout Aware Electromigration Analysis of Power/Ground Networks.- Power-Gating for Leakage Control and Beyond.- Soft Error Rate and Fault Tolerance Techniques for FPGAs.

Textul de pe ultima copertă

This book presents physical understanding, modeling and simulation, on-chip characterization, layout solutions, and design techniques that are effective to enhance the reliability of various circuit units.  The authors provide readers with techniques for state of the art and future technologies, ranging from technology modeling, fault detection and analysis, circuit hardening, and reliability management.
  • Provides comprehensive review on various reliability mechanisms at sub-45nm nodes;
  • Describes practical modeling and characterization techniques for reliability;
  • Includes thorough presentation of robust design techniques for major VLSI design units;
  • Promotes physical understanding with first-principle simulations.

Caracteristici

Provides comprehensive review on various reliability mechanisms at sub-45nm nodes Describes practical modeling and characterization techniques for reliability Includes thorough presentation of robust design techniques for major VLSI design units Promotes physical understanding with first-principle simulations Includes supplementary material: sn.pub/extras