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CMOS Test and Evaluation: A Physical Perspective de Manjul Bhushan

CMOS Test and Evaluation: A Physical Perspective

Autor Manjul Bhushan, Mark B. Ketchen
en Limba Engleză Paperback – 10 sep 2016
CMOS Test and Evaluation: A Physical Perspective is a single source for an integrated view of test and data analysis methodology for CMOS products, covering circuit sensitivities to MOSFET characteristics, impact of silicon technology process variability, applications of embedded test structures and sensors, product yield, and reliability over the lifetime of the product. This book also covers statistical data analysis and visualization techniques, test equipment and CMOS product specifications, and examines product behavior over its full voltage, temperature and frequency range.
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Specificații

ISBN-13: 9781493947027
ISBN-10: 1493947028
Pagini: 437
Ilustrații: XIII, 424 p. 338 illus.
Dimensiuni: 155 x 235 x 23 mm
Greutate: 0.61 kg
Ediția:Softcover reprint of the original 1st ed. 2015
Editura: Springer
Colecția Springer
Locul publicării:New York, NY, United States

Cuprins

Introduction.- CMOS Circuit Basics.- CMOS Storage Elements and Synchronous Logic.- IDDQ and Power.- Embedded PVT Monitors.- Variability.- Product Chip Test and Characterization.- Reliability, Burn-In and Guardbands.- Data Analysis and Characterization.- CMOS Metrics and Model Evaluation.

Notă biografică

Manjul Bhushan is a technical consultant in New York.
Mark Ketchen is a technical consultant in Massachusetts.

Textul de pe ultima copertă

This book extends test structure applications described in Microelectronic Test Struc­tures for CMOS Technology (Springer 2011) to digital CMOS product chips. Intended for engineering students and professionals, this book provides a single comprehensive source for evaluating CMOS technology and product test data from a basic knowledge of the physical behavior of the constituent components. Elementary circuits that exhibit key properties of complex CMOS chips are simulated and analyzed, and an integrated view of design, test and characterization is developed. Appropriately designed circuit monitors embedded in the CMOS chip serve to correlate CMOS technology models and circuit design tools to the hardware and also aid in test debug. Impact of silicon process variability, reliability, and power and performance sensitivities to a range of product application conditions are described. Circuit simulations exemplify the methodologies presented, and problems are included at the end of the chapters.

Caracteristici

Relates CMOS product performance to basic physical models of transistors and passive elements Uses embedded test structures and sensors for product test debug, yield and performance evaluation Describes impact of device variability Discusses application corners, schmooing and product specifications including guardbands Presents an overall view of CMOS product chip test, test equipment and diagnostic tools Describes data analysis techniques for rapid evaluation and debug during test Features nearly 300 illustrations Includes supplementary material: sn.pub/extras Request lecturer material: sn.pub/lecturer-material