Compilation Techniques for Reconfigurable Architectures
Autor João M.P. Cardoso, Pedro C. Dinizen Limba Engleză Paperback – 29 oct 2010
Toate formatele și edițiile | Preț | Express |
---|---|---|
Paperback (1) | 629.52 lei 6-8 săpt. | |
Springer Us – 29 oct 2010 | 629.52 lei 6-8 săpt. | |
Hardback (1) | 634.50 lei 6-8 săpt. | |
Springer Us – 20 oct 2008 | 634.50 lei 6-8 săpt. |
Preț: 629.52 lei
Preț vechi: 786.89 lei
-20% Nou
Puncte Express: 944
Preț estimativ în valută:
120.49€ • 125.24$ • 99.81£
120.49€ • 125.24$ • 99.81£
Carte tipărită la comandă
Livrare economică 04-18 februarie 25
Preluare comenzi: 021 569.72.76
Specificații
ISBN-13: 9781441935106
ISBN-10: 144193510X
Pagini: 236
Ilustrații: XII, 223 p. 88 illus.
Dimensiuni: 155 x 235 x 12 mm
Greutate: 0.34 kg
Ediția:Softcover reprint of hardcover 1st ed. 2009
Editura: Springer Us
Colecția Springer
Locul publicării:New York, NY, United States
ISBN-10: 144193510X
Pagini: 236
Ilustrații: XII, 223 p. 88 illus.
Dimensiuni: 155 x 235 x 12 mm
Greutate: 0.34 kg
Ediția:Softcover reprint of hardcover 1st ed. 2009
Editura: Springer Us
Colecția Springer
Locul publicării:New York, NY, United States
Public țintă
Professional/practitionerCuprins
Overview of Reconfigurable Architectures.- Compilation and Synthesis Flows.- Code Transformations.- Mapping and Execution Optimizations.- Compilers for Reconfigurable Architectures.- Perspectives on Programming Reconfigurable Computing Platforms.- Final Remarks.
Textul de pe ultima copertă
This book describes a wide range of code transformations and mapping techniques for compiling programs written in high-level programming languages to reconfigurable architectures. While many of these transformations and mapping techniques have been developed in the context of compilation for traditional architectures and high-level synthesis, their application to reconfigurable architectures poses a whole new set of challenges- particularly when targeting fine-grained reconfigurable architectures such as contemporary Field-Programmable Gate-Arrays (FPGAs).
Organized in eight chapters, this book provides a helpful structure for practitioners and graduate students in the area of computer science and electrical and computer engineering to effectively map computations to reconfigurable architectures.
Key Features:
Organized in eight chapters, this book provides a helpful structure for practitioners and graduate students in the area of computer science and electrical and computer engineering to effectively map computations to reconfigurable architectures.
Key Features:
- Introduces the reader to hardware compilation and reconfigurable computing architectures.
- Presents a range of compiler code transformations and mapping techniques focusing on imperative programming languages.
- Allows the reader to bridge the gap between the software compilation and the hardware compilation and synthesis domains.
- Brings a number of compilation techniques together into one structured source, and includes representative examples of their applications.
- Provides a historical perspective on representative compilation research efforts over the last 15 years.
Caracteristici
Introduces hardware compilation and reconfigurable computing architectures Presents a range of compiler code transformations and mapping techniques focusing on imperative programming languages Bridges the gap between software compilation, hardware compilation, and synthesis domains Brings a number of compilation techniques together into one structured source, and includes representative examples of their applications Provides a historical perspective on representative compilation research efforts over the last 15 years