Debug Automation from Pre-Silicon to Post-Silicon
Autor Mehdi Dehbashi, Görschwin Feyen Limba Engleză Hardback – 9 oct 2014
- Describes a unified framework for debug automation used at both pre-silicon and post-silicon stages;
- Provides approaches for debug automation of a hardware system at different levels of abstraction, i.e., chip, gate-level, RTL and transaction level;
- Includes techniques for debug automation of design bugs and electrical faults, as well as an infrastructure to debug NoC-based multiprocessor SoCs.
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Specificații
ISBN-13: 9783319093086
ISBN-10: 3319093088
Pagini: 171
Ilustrații: XIV, 171 p. 93 illus., 55 illus. in color.
Dimensiuni: 155 x 235 x 15 mm
Greutate: 0.44 kg
Ediția:2015
Editura: Springer International Publishing
Colecția Springer
Locul publicării:Cham, Switzerland
ISBN-10: 3319093088
Pagini: 171
Ilustrații: XIV, 171 p. 93 illus., 55 illus. in color.
Dimensiuni: 155 x 235 x 15 mm
Greutate: 0.44 kg
Ediția:2015
Editura: Springer International Publishing
Colecția Springer
Locul publicării:Cham, Switzerland
Public țintă
Professional/practitionerCuprins
Introduction.- Preliminaries.- Part I Debug of Design Bugs.- Automated Debugging for Logic Bugs.- Automated Debugging from Pre-Silicon to Post-Silicon.- Automated Debugging for Synchronization Bugs.- Part II Debug of Delay Faults.- Analyzing Timing Variations.- Automated Debugging for Timing Variations.- Efficient Automated Speedpath Debugging.- Part III Debug of Transactions.- Online Debug for NoC-Based Multiprocessor SoCs.- Summary and Outlook.
Notă biografică
Mehdi Dehbashi received his M.Sc. in computer engineering from Sharif University of Technology, Tehran, Iran, in 2007 and his PhD in computer science from University of Bremen, Bremen, Germany in 2013. He is currently a researcher with the Group of Cyber-Physical Systems of the German Research Center for Artificial Intelligence (DFKI). His research interests are computer aided design for circuits and systems, dependable embedded systems design, and distributed embedded systems.
Goerschwin Fey is a professor for Reliable Embedded Systems at the University of Bremen and heads the Department of Avionics Systems at the Institute of Space Systems of the German Aerospace Center (DLR). He received his Diploma in Computer Science from Martin-Luther-Universität Halle-Wittenberg in 2001 and his PhD in Computer Science from University of Bremen in 2006. Goerschwin published more than 50 papers at international conferences and journals. His research yields advanced tool support for embedded system's design with a focus on automated debugging, diagnosis and design understanding.
Goerschwin Fey is a professor for Reliable Embedded Systems at the University of Bremen and heads the Department of Avionics Systems at the Institute of Space Systems of the German Aerospace Center (DLR). He received his Diploma in Computer Science from Martin-Luther-Universität Halle-Wittenberg in 2001 and his PhD in Computer Science from University of Bremen in 2006. Goerschwin published more than 50 papers at international conferences and journals. His research yields advanced tool support for embedded system's design with a focus on automated debugging, diagnosis and design understanding.
Textul de pe ultima copertă
This book describes automated debugging approaches for the bugs and the faults which appear in different abstraction levels of a hardware system. The authors employ a transaction-based debug approach to systems at the transaction-level, asserting the correct relation of transactions. The automated debug approach for design bugs finds the potential fault candidates at RTL and gate-level of a circuit. Debug techniques for logic bugs and synchronization bugs are demonstrated, enabling readers to localize the most difficult bugs. Debug automation for electrical faults (delay faults)finds the potentially failing speedpaths in a circuit at gate-level. The various debug approaches described achieve high diagnosis accuracy and reduce the debugging time, shortening the IC development cycle and increasing the productivity of designers.
- Describes a unified framework for debug automation used at both pre-silicon and post-silicon stages;
- Provides approaches for debug automation of a hardware system at different levels of abstraction, i.e., chip, gate-level, RTL and transaction level;
- Includes techniques for debug automation of design bugs and electrical faults, as well as an infrastructure to debug NoC-based multiprocessor SoCs.
Caracteristici
Describes a unified framework for debug automation that is used at both pre-silicon and post-silicon stages Provides approaches for debug automation of a hardware system at different levels of abstraction, i.e., chip, gate-level, RTL and transaction level Includes techniques for debug automation of design bugs and electrical faults, as well as an infrastructure to debug NoC-based multiprocessor SoCs Includes supplementary material: sn.pub/extras