Cantitate/Preț
Produs
Total produse
Vezi coșul
Design for Manufacturability: From 1D to 4D for 90–22 nm Technology Nodes de Artur Balasinski

Design for Manufacturability: From 1D to 4D for 90–22 nm Technology Nodes

Autor Artur Balasinski
en Limba Engleză Hardback – 6 oct 2013
This book explains integrated circuit design for manufacturability (DfM) at the product level (packaging, applications) and applies engineering DfM principles to the latest standards of product development at 22 nm technology nodes.  It is a valuable guide for layout designers, packaging engineers and quality engineers, covering DfM development from 1D to 4D, involving IC design flow setup, best practices, links to manufacturing and product definition, for process technologies down to 22 nm node, and product families including memories, logic, system-on-chip and system-in-package.
Citește tot Restrânge

Toate formatele și edițiile

Toate formatele și edițiile Preț Express
Paperback (1) 68242 lei  43-57 zile
  Springer – 23 aug 2016 68242 lei  43-57 zile
Hardback (1) 63721 lei  43-57 zile
  Springer – 6 oct 2013 63721 lei  43-57 zile

Preț: 63721 lei

Preț vechi: 74966 lei
-15% Nou

Puncte Express: 956
Preț estimativ în valută:
12195€ • 12667$ • 10130£

Carte tipărită la comandă

Livrare economică 03-17 februarie 25

 Adaugă în coș

Wish list
Gift list
Am citit!
Adaugă în listă
Preluare comenzi: 021 569.72.76

Specificații

ISBN-13: 9781461417606
ISBN-10: 1461417600
Pagini: 288
Ilustrații: VIII, 278 p. 214 illus., 45 illus. in color.
Dimensiuni: 155 x 235 x 21 mm
Greutate: 0.69 kg
Ediția:2014
Editura: Springer
Colecția Springer
Locul publicării:New York, NY, United States

Public țintă

Professional/practitioner

Cuprins

Preface.- Classic DfM: from 2D to 3D.- DfM at 28 nm and Beyond.- New DfM Domain: Stress Effects.- Conclusions and Future Work.

Notă biografică

Artur Balasinski is a Technology Design Integration Manager for Cypress Semiconductor in San Jose, California.

Textul de pe ultima copertă

This book explains integrated circuit design for manufacturability (DfM) at the product level (packaging, applications) and applies engineering DfM principles to the latest standards of product development at 22 nm technology nodes.  It is a valuable guide for layout designers, packaging engineers and quality engineers, covering DfM development from 1D to 4D, involving IC design flow setup, best practices, links to manufacturing and product definition, for process technologies down to 22 nm node, and product families including memories, logic, system-on-chip and system-in-package.
·         Provides design for manufacturability guidelines on layout techniques for the most advanced, 22 nm  technology nodes;
·         Includes information valuable to layout designers, packaging engineers and quality engineers, working on memories, logic, system-on-chip and system-in-package; 
·         Offers a highly-accessible, single-source reference to information otherwise available only from disparate sources;
·         Helps readers to translate reliability methodology into real design flows.

Caracteristici

Provides design for manufacturability guidelines on layout techniques for the most advanced, 22 nm technology nodes Includes information valuable to layout designers, packaging engineers and quality engineers, working on memories, logic, system-on-chip and system-in-package Offers a highly-accessible, single-source reference to information otherwise available only from disparate sources Helps readers to translate reliability methodology into real design flows