FPGA-BASED Hardware Accelerators: Lecture Notes in Electrical Engineering, cartea 566
Autor Iouliia Skliarova, Valery Sklyaroven Limba Engleză Paperback – 14 aug 2020
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Paperback (1) | 763.79 lei 6-8 săpt. | |
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Hardback (1) | 769.65 lei 6-8 săpt. | |
Springer International Publishing – 31 mai 2019 | 769.65 lei 6-8 săpt. |
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Specificații
ISBN-13: 9783030207236
ISBN-10: 3030207234
Pagini: 245
Ilustrații: XVI, 245 p.
Dimensiuni: 155 x 235 mm
Greutate: 0.37 kg
Ediția:1st ed. 2019
Editura: Springer International Publishing
Colecția Springer
Seria Lecture Notes in Electrical Engineering
Locul publicării:Cham, Switzerland
ISBN-10: 3030207234
Pagini: 245
Ilustrații: XVI, 245 p.
Dimensiuni: 155 x 235 mm
Greutate: 0.37 kg
Ediția:1st ed. 2019
Editura: Springer International Publishing
Colecția Springer
Seria Lecture Notes in Electrical Engineering
Locul publicării:Cham, Switzerland
Cuprins
Reconfigurable devices and design tools.- Architectures of FPGA-based hardware accelerators and design techniques.- Hardware accelerators for data search.- Hardware accelerators for data sort.- FPGA-based hardware accelerators for selected computational problems.- Hardware/software co-design.
Textul de pe ultima copertă
This book suggests and describes a number of fast parallel circuits for data/vector processing using FPGA-based hardware accelerators. Three primary areas are covered: searching, sorting, and counting in combinational and iterative networks. These include the application of traditional structures that rely on comparators/swappers as well as alternative networks with a variety of core elements such as adders, logical gates, and look-up tables. The iterative technique discussed in the book enables the sequential reuse of relatively large combinational blocks that execute many parallel operations with small propagation delays. For each type of network discussed, the main focus is on the step-by-step development of the architectures proposed from initial concepts to synthesizable hardware description language specifications. Each type of network is taken through several stages, including modeling the desired functionality in software, the retrieval and automatic conversion of key functions, leading to specifications for optimized hardware modules. The resulting specifications are then synthesized, implemented, and tested in FPGAs using commercial design environments and prototyping boards. The methods proposed can be used in a range of data processing applications, including traditional sorting, the extraction of maximum and minimum subsets from large data sets, communication-time data processing, finding frequently occurring items in a set, and Hamming weight/distance counters/comparators. The book is intended to be a valuable support material for university and industrial engineering courses that involve FPGA-based circuit and system design.
Caracteristici
The book describes design and implementations of FPGA (Field-Programmable Gate Arrays)/PSoC (Programmable Systems-on-Chip) hardware accelerators Focus is on hardware accelerators for data/information processing and combinatorial optimization The presented material will be supported by numerous practical examples with demonstration of the results using recent prototyping systems from Xilinx