From Code to Chip: Open-Source Automated Analog Layout Design: Synthesis Lectures on Engineering, Science, and Technology
Autor Jakob Ratschenberger, Harald Pretlen Limba Engleză Hardback – 21 sep 2024
Din seria Synthesis Lectures on Engineering, Science, and Technology
- Preț: 393.52 lei
- Preț: 395.91 lei
- Preț: 321.34 lei
- Preț: 284.04 lei
- 15% Preț: 500.59 lei
- Preț: 397.38 lei
- 15% Preț: 581.14 lei
- Preț: 387.75 lei
- Preț: 320.40 lei
- 20% Preț: 594.83 lei
- 17% Preț: 458.16 lei
- 20% Preț: 588.21 lei
- Preț: 396.42 lei
- 15% Preț: 644.95 lei
- Preț: 329.98 lei
- Preț: 214.57 lei
- Preț: 236.41 lei
- 20% Preț: 331.25 lei
- Preț: 392.60 lei
- 15% Preț: 527.97 lei
- Preț: 420.97 lei
- 15% Preț: 583.61 lei
- Preț: 352.63 lei
- 15% Preț: 527.97 lei
- Preț: 221.25 lei
- 15% Preț: 526.35 lei
- Preț: 399.22 lei
- Preț: 387.20 lei
- Preț: 386.81 lei
- Preț: 389.70 lei
- 20% Preț: 295.74 lei
- 15% Preț: 640.06 lei
- 15% Preț: 523.91 lei
- Preț: 514.29 lei
- Preț: 413.76 lei
- Preț: 404.13 lei
- Preț: 427.71 lei
- Preț: 390.63 lei
- Preț: 320.40 lei
- 15% Preț: 531.26 lei
- 15% Preț: 528.80 lei
- 15% Preț: 529.60 lei
- Preț: 386.81 lei
- Preț: 414.42 lei
- Preț: 162.87 lei
- Preț: 349.91 lei
- Preț: 383.12 lei
Preț: 275.18 lei
Nou
Puncte Express: 413
Preț estimativ în valută:
52.66€ • 54.56$ • 43.95£
52.66€ • 54.56$ • 43.95£
Carte tipărită la comandă
Livrare economică 18-24 martie
Preluare comenzi: 021 569.72.76
Specificații
ISBN-13: 9783031685613
ISBN-10: 303168561X
Ilustrații: X, 90 p. 70 illus. in color.
Dimensiuni: 168 x 240 mm
Ediția:2025
Editura: Springer Nature Switzerland
Colecția Springer
Seria Synthesis Lectures on Engineering, Science, and Technology
Locul publicării:Cham, Switzerland
ISBN-10: 303168561X
Ilustrații: X, 90 p. 70 illus. in color.
Dimensiuni: 168 x 240 mm
Ediția:2025
Editura: Springer Nature Switzerland
Colecția Springer
Seria Synthesis Lectures on Engineering, Science, and Technology
Locul publicării:Cham, Switzerland
Cuprins
Introduction.- Theoretical Basics.- Circuit Capturing.- PDK - Design Rule Capturing.- Placement.- Routing.- Experimental Results.
Notă biografică
Jakob Ratschenberger has received his Bachelor of Science (BSc) in the field of Electronics and Information Technology, from the Johannes Kepler University Linz, Austria, in 2022. He received the Dipl.-Ing. degree (with distinction) in Electronics and Information Technology from the Johannes Kepler University Linz, Austria, in 2024.
Harald Pretl received a Dipl.-Ing. degree (with distinction) in electrical engineering from the Graz University of Technology, Austria, in 1997, and the Dr. techn. degree from the Johannes Kepler University (JKU) in Linz, Austria, in 2001. From 2000 to 2011, he worked at Infineon Technologies as Director and Senior Principal Engineer, from 2011 to 2019 at Intel as Senior Principal Engineer and Chief RF Technologist, and from 2019 to 2022 at Apple, contributing to several generations of cellular RF transceivers. Since 2015, he has been a full professor, heading the Institute for Integrated Circuits (IIC) at JKU. He maintains the IIC-OSIC-TOOLS and is a member of the IEEE SSCS TC-OSE. In 2023, Harald founded PRETL consult GmbH, providing consulting services in the area of IC design.
Harald Pretl received a Dipl.-Ing. degree (with distinction) in electrical engineering from the Graz University of Technology, Austria, in 1997, and the Dr. techn. degree from the Johannes Kepler University (JKU) in Linz, Austria, in 2001. From 2000 to 2011, he worked at Infineon Technologies as Director and Senior Principal Engineer, from 2011 to 2019 at Intel as Senior Principal Engineer and Chief RF Technologist, and from 2019 to 2022 at Apple, contributing to several generations of cellular RF transceivers. Since 2015, he has been a full professor, heading the Institute for Integrated Circuits (IIC) at JKU. He maintains the IIC-OSIC-TOOLS and is a member of the IEEE SSCS TC-OSE. In 2023, Harald founded PRETL consult GmbH, providing consulting services in the area of IC design.
Textul de pe ultima copertă
This book shows how the layout of an analog circuit can be automatically generated in a fully open-source way. Based on an exemplary design flow, it introduces and explains the necessary steps for transforming a SPICE netlist into a layout, which can be inspected by the open-source layout editor Magic VLSI. This is done by using the industry’s first open-source process design kit SKY130. Furthermore, the implementation of the design flow in the programming language Python is available as open-source on GitHub.
In addition, this book:
In addition, this book:
- Describes in detail data structures necessary for implementing an analog layout design automation tool.
- Scopes and explains the entire design flow, starting from a netlist and ending in a layout.
- Provides succinct introductions to key topics, with references as needed for further technical depth.
Caracteristici
Describes in detail data structures necessary for implementing an analog layout design automation tool Scopes and explains the entire design flow, starting from a netlist and ending in a layout Provides succinct introductions to key topics, with references as needed for further technical depth