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High-Bandwidth Memory Interface de Chulwoo Kim

High-Bandwidth Memory Interface: SpringerBriefs in Electrical and Computer Engineering

Autor Chulwoo Kim, Hyun-Woo Lee, Junyoung Song
en Limba Engleză Paperback – 18 noi 2013
This book provides an overview of recent advances in memory interface design at both the architecture and circuit levels. Coverage includes signal integrity and testing, TSV interface, high-speed serial interface including equalization, ODT, pre-emphasis, wide I/O interface including crosstalk, skew cancellation, and clock generation and distribution. Trends for further bandwidth enhancement are also covered.
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Specificații

ISBN-13: 9783319023809
ISBN-10: 3319023802
Pagini: 96
Ilustrații: VIII, 88 p. 91 illus., 41 illus. in color.
Dimensiuni: 155 x 235 x 5 mm
Greutate: 0.15 kg
Ediția:2014
Editura: Springer International Publishing
Colecția Springer
Seria SpringerBriefs in Electrical and Computer Engineering

Locul publicării:Cham, Switzerland

Public țintă

Professional/practitioner

Cuprins

An introduction to high-speed DRAM.- An I/O Line Configuration and Organization of DRAM.- Clock generation and distribution.- Transceiver Design.- TSV Interface for DRAM.

Textul de pe ultima copertă

This book provides an overview of recent advances in memory interface design at both the architecture and circuit levels. Coverage includes signal integrity and testing, TSV interface, high-speed serial interface including equalization, ODT, pre-emphasis, wide I/O interface including crosstalk, skew cancellation, and clock generation and distribution. Trends for further bandwidth enhancement are also covered.
 
• Enables readers with minimal background in memory design to understand the basics of high-bandwidth memory interface design;
• Presents state-of-the-art techniques for memory interface design;
• Covers memory interface design at both the circuit level and system architecture level.

Caracteristici

Enables readers with minimal background in memory design to understand the basics of high-bandwidth memory interface design Presents state-of-the-art techniques for memory interface design Covers memory interface design at both the circuit level and system architecture level Includes supplementary material: sn.pub/extras