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Hybrid Fault Tolerance Techniques to Detect Transient Faults in Embedded Processors de José Rodrigo Azambuja

Hybrid Fault Tolerance Techniques to Detect Transient Faults in Embedded Processors

Autor José Rodrigo Azambuja, Fernanda Kastensmidt, Jürgen Becker
en Limba Engleză Hardback – 28 iul 2014
This book describes fault tolerance techniques based on software and hardware to create hybrid techniques. They are able to reduce overall performance degradation and increase error detection when associated with applications implemented in embedded processors.  Coverage begins with an extensive discussion of the current state-of-the-art in fault tolerance techniques.  The authors then discuss the best trade-off between software-based and hardware-based techniques and introduce novel hybrid techniques. Proposed techniques increase existing fault detection rates up to 100%, while maintaining low performance overheads in area and application execution time.
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Specificații

ISBN-13: 9783319063393
ISBN-10: 3319063391
Pagini: 112
Ilustrații: XVIII, 94 p. 37 illus., 11 illus. in color.
Dimensiuni: 155 x 235 x 15 mm
Greutate: 0.34 kg
Ediția:2014
Editura: Springer International Publishing
Colecția Springer
Locul publicării:Cham, Switzerland

Public țintă

Research

Cuprins

Introduction.- Background.- Fault Tolerance Techniques for Processors.- Proposed Techniques to Detect Transient Faults in Processors.- Simulation Fault Injection Experimental Results.- Configuration Bitstream Fault Injection Experimental Results.- Radiation Experimental Results.- Conclusions and Future Work.

Textul de pe ultima copertă

This book describes fault tolerance techniques based on software and hardware to create hybrid techniques. They are able to reduce overall performance degradation and increase error detection when associated with applications implemented in embedded processors. Coverage begins with an extensive discussion of the current state-of-the-art in fault tolerance techniques. The authors then discuss the best trade-off between software-based and hardware-based techniques and introduce novel hybrid techniques. Proposed techniques increase existing fault detection rates up to 100%, while maintaining low performance overheads in area and application execution time.
• Discusses the effects of radiation on modern integrated circuits;
• Provides a comprehensive overview of state-of-the art fault tolerance techniques based on software, hardware, and hybrid techniques;
• Introduces novel hybrid fault tolerance techniques for reconfigurable FPGAs and ASICs;
• Performs fault injection campaigns by simulation, bitstream fault injection, and radiation experiments;
• Enables readers to use techniques with lower performance degradation, area occupation, and memory usage.

Caracteristici

Discusses the effects of radiation on modern integrated circuits Provides a comprehensive overview of state-of-the art fault tolerance techniques based on software, hardware, and hybrid techniques Introduces novel hybrid fault tolerance techniques for reconfigurable FPGAs and ASICs Performs fault injection campaigns by simulation, bitstream fault injection, and radiation experiments Enables readers to use techniques with lower performance degradation, area occupation, and memory usage Includes supplementary material: sn.pub/extras