Cantitate/Preț
Produs

Integrated Circuit Failure Analysis – A Guide to Preparation Techniques: Quality and Reliability Engineering Series

Autor F Beck
en Limba Engleză Hardback – 18 ian 1998
Fault analysis of highly-integrated semiconductor circuits has become an indispensable discipline in the optimization of product quality. Integrated Circuit Failure Analysis describes state-of-the-art procedures for exposing suspected failure sites in semiconductor devices. The author adopts a hands-on problem-oriented approach, founded on many years of practical experience, complemented by the explanation of basic theoretical principles. Features include: Advanced methods in device preparation and technical procedures for package inspection and semiconductor reliability. ? Illustration of chip isolation and step-by-step delayering of chips by wet chemical and modern plasma dry etching techniques. ? Particular analysis of bipolar and MOS circuits, although techniques are equally relevant to other semiconductors. ? Advice on the choice of suitable laboratory equipment. ? Numerous photographs and drawings providing guidance for checking results. Focusing on modern techniques, this practical text will enable both academic and industrial researchers and IC designers to expand the range of analytical and preparative methods at their disposal and to adapt to the needs of new technologies.
Citește tot Restrânge

Din seria Quality and Reliability Engineering Series

Preț: 133593 lei

Preț vechi: 146805 lei
-9% Nou

Puncte Express: 2004

Preț estimativ în valută:
25566 26635$ 21257£

Carte tipărită la comandă

Livrare economică 10-24 februarie 25

Preluare comenzi: 021 569.72.76

Specificații

ISBN-13: 9780471974017
ISBN-10: 0471974013
Pagini: 190
Dimensiuni: 152 x 229 x 12 mm
Greutate: 0.44 kg
Ediția:New.
Editura: Wiley
Seria Quality and Reliability Engineering Series

Locul publicării:Chichester, United Kingdom

Public țintă

Academic and industrial researchers and IC designers involved in identifying the basic mechanism of failure analysis and designing the next generation of subsystem.

Notă biografică