Low Power Design in Deep Submicron Electronics: Nato ASI Subseries E:, cartea 337
Editat de W. Nebel, Jean Mermeten Limba Engleză Paperback – 31 dec 1997
From the Foreword:
`... This global nature of design for low power was well understood by Wolfgang Nebel and Jean Mermet when organizing the NATO workshop which is the origin of the book. They invited the best experts in the field to cover all aspects of low power design. As a result the chapters in this book are covering deep-submicron CMOS digital system design for low power in a systematic way from process technology all the way up to software design and embedded software systems.
Low Power Design in Deep Submicron Electronics is an excellent guide for the practicing engineer, the researcher and the student interested in this crucial aspect of actual CMOS design. It contains about a thousand references to all aspects of the recent five years of feverish activity in this exciting aspect of design.'
Hugo de Man
Professor, K.U. Leuven, Belgium
Senior Research Fellow, IMEC, Belgium
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Specificații
ISBN-13: 9780792381037
ISBN-10: 0792381033
Pagini: 580
Ilustrații: XVI, 580 p.
Dimensiuni: 152 x 229 x 34 mm
Greutate: 0.87 kg
Ediția:1997
Editura: Springer Us
Colecția Springer
Seria Nato ASI Subseries E:
Locul publicării:New York, NY, United States
ISBN-10: 0792381033
Pagini: 580
Ilustrații: XVI, 580 p.
Dimensiuni: 152 x 229 x 34 mm
Greutate: 0.87 kg
Ediția:1997
Editura: Springer Us
Colecția Springer
Seria Nato ASI Subseries E:
Locul publicării:New York, NY, United States
Public țintă
ResearchCuprins
1. Introduction.- 2. Application and Technology Forecast.- Future Low Power Applications.- Enabling Technologies.- Conclusions.- References.- 3. Low Power Design Flow and Libraries.- Key Issues on Libraries for Low Power Deep Sub-Micron Design.- Power Reduction Through Libraries.- Design Flow for Low Power Deep Sub-Micron.- Libraries for Low Power.- Conclusions.- References.- 4. Low Power Circuit and Logic Level Design.- 4.1. Modeling.- 4.2. Circuit and Logic Level Design.- 4.3. Power Estimation at the Logic Level.- 4.4. Advanced Power Estimation Techniques.- 5. Power Optimization.- 5.1. Layout Optimization.- 5.2. Combinational Circuit Optimization.- 5.3. Sequential Synthesis and Optimization for Low Power.- 5.4. RT and Algorithmic-Level Optimization for Low Power.- 5.5. High Level Synthesis for Low Power.- 6. System Level Low Power Design.- 6.1. Embedded System Design.- 6.2. Power Analysis and Design at System Level.- 6.3. Software Design for Low Power.- 7. Asynchronous Design.- 8. Low Voltage Technologies.- 9. Case Studies.- 9.1. Microprocessor Design.- 9.2. Low Power Applications at System Level.