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Memory-Based Logic Synthesis de Tsutomu Sasao

Memory-Based Logic Synthesis

Autor Tsutomu Sasao
en Limba Engleză Hardback – 8 mar 2011
This book describes the synthesis of logic functions using memories. It is useful to design field programmable gate arrays (FPGAs) that contain both small-scale memories, called look-up tables (LUTs), and medium-scale memories, called embedded memories. This is a valuable reference for both FPGA system designers and CAD tool developers, concerned with logic synthesis for FPGAs.
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Specificații

ISBN-13: 9781441981035
ISBN-10: 1441981039
Pagini: 189
Ilustrații: XII, 189 p.
Dimensiuni: 155 x 235 x 20 mm
Greutate: 0.45 kg
Ediția:2011
Editura: Springer
Colecția Springer
Locul publicării:New York, NY, United States

Public țintă

Research

Cuprins

Introduction.- Basic Elements.- Definitions and Basic Properties.- MUX-Based Synthesis.- Cascade-Based Synthesis.- Encoding Method.- Functions with Small C-Measures.- C-Measure of Sparse Functions.- Index Generation Functions.- Hash-Based Synthesis.- Reduction of the Number of Variables.- Various Realizations.- Conclusions.

Textul de pe ultima copertă

This book describes the synthesis of logic functions using memories. It is useful to design field programmable gate arrays (FPGAs) that contain both small-scale memories, called look-up tables (LUTs), and medium-scale memories, called embedded memories.  This is a valuable reference for both FPGA system designers and CAD tool developers, concerned with logic synthesis for FPGAs.  Anyone using logic gates to design logic circuits, you can benefit from the methods described in this book. 
  • Describes in detail the synthesis of logic functions using memories;
  •  Introduces a look-up tables (LUT) cascade as a new architecture for logic synthesis;
  •  Shows logic design methods for index generation functions;
  •  Introduces C-measure, which specifies the complexity of Boolean functions;
  •  Introduces hash-based design methods, which efficiently synthesize index generation functions by pairs of smaller memories and can be applied to IP address tables, packet filtering, terminal access controllers, memory patch circuits, virus scanning circuits, intrusion detection circuits, fault map of memories, code converters and pattern matching.
     

Caracteristici

Describes in detail the synthesis of logic functions using memories Includes a look-up tables (LUT) cascade as a new architecture for logic synthesis Shows logic design methods for index generation functions Introduces C-measure, which specifies the complexity of Boolean functions Presents hash-based design methods, which efficiently synthesize index generation functions by pairs of smaller memories and can be applied to IP address tables, packet filtering, terminal access controllers, memory patch circuits, virus scanning circuits, fault map of memories, and pattern matching Includes supplementary material: sn.pub/extras