Microelectronic Test Structures for CMOS Technology
Autor Manjul Bhushan, Mark B. Ketchenen Limba Engleză Hardback – 30 aug 2011
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Specificații
ISBN-13: 9781441993762
ISBN-10: 1441993762
Pagini: 408
Ilustrații: XXXIV, 373 p.
Dimensiuni: 155 x 235 x 30 mm
Greutate: 0.74 kg
Ediția:2011
Editura: Springer
Colecția Springer
Locul publicării:New York, NY, United States
ISBN-10: 1441993762
Pagini: 408
Ilustrații: XXXIV, 373 p.
Dimensiuni: 155 x 235 x 30 mm
Greutate: 0.74 kg
Ediția:2011
Editura: Springer
Colecția Springer
Locul publicării:New York, NY, United States
Public țintă
Professional/practitionerCuprins
Introduction.- Test Structure Basics.- Resistors.- Capacitors.- MOSFETs.- Ring Oscillators.- High Speed Characterization.- Test Structures of SOI Technology.- Test Equipment and Measurements.- Data Analysis.
Textul de pe ultima copertă
Microelectronic Test Structures for CMOS Technology and Products addresses the basic concepts of the design of test structures for incorporation within test-vehicles, scribe-lines, and CMOS products. The role of test structures in the development and monitoring of CMOS technologies and products has become ever more important with the increased cost and complexity of development and manufacturing. In this timely volume, IBM scientists Manjul Bhushan and Mark Ketchen emphasize high speed characterization techniques for digital CMOS circuit applications and bridging between circuit performance and characteristics of MOSFETs and other circuit elements. Detailed examples are presented throughout, many of which are equally applicable to other microelectronic technologies as well. The authors’ overarching goal is to provide students and technology practitioners alike a practical guide to the disciplined design and use of test structures that give unambiguous information on the parametrics and performance of digital CMOS technology.
Caracteristici
Provides a comprehensive guide to designing the most effective and lowest-cost microelectronic test structures Uses specific examples of good design techniques and discusses common errors to avoid in order to guide readers Presents an integrated approach to multiple parts of the design process, using measurement techniques and statistical analysis combined with physical mapping Includes supplementary material: sn.pub/extras