Reliability of Nanoscale Circuits and Systems: Methodologies and Circuit Architectures
Autor Miloš Stanisavljević, Alexandre Schmid, Yusuf Leblebicien Limba Engleză Paperback – 11 oct 2014
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Specificații
ISBN-13: 9781489982544
ISBN-10: 148998254X
Pagini: 224
Ilustrații: XXVII, 195 p.
Dimensiuni: 155 x 235 x 12 mm
Greutate: 0.32 kg
Ediția:2011
Editura: Springer
Colecția Springer
Locul publicării:New York, NY, United States
ISBN-10: 148998254X
Pagini: 224
Ilustrații: XXVII, 195 p.
Dimensiuni: 155 x 235 x 12 mm
Greutate: 0.32 kg
Ediția:2011
Editura: Springer
Colecția Springer
Locul publicării:New York, NY, United States
Public țintă
ResearchCuprins
Introduction.- Reliability, Faults and Fault Models.- Nanotechnology and Nanodevices.- Fault-Tolerant Architectures and Approaches.- Reliability Evaluation Techniques.- Averaging Design Implementations.- Statistical Evaluation of Fault-Tolerance Using Proability Density Functions.- System Level Reliability Evaluation and Optimization.- Summary and Conclusions.- References.
Notă biografică
Miloš Stanisavljevic received the M.S. degree in electrical engineering fromthe Faculty of Electrical Engineering, University of Belgrade, Belgrade, Serbia,in 2004, and the Ph.D. degree in electrical engineering from the Swiss FederalInstitute of Technology (EPFL), Lausanne, Switzerland, in 2009. During2004, he was an Analog Design and Layout Engineer for Elsys Design, Belgrade/Texas Instruments, Nice. In the end of 2004, he joined MicroelectronicSystems Laboratory, EPFL, as a Research Assistant. During 2006, he waswith International Business Machines Corporation (IBM) Research, Zurich,for six months, where he was involved in the project related to reliability emulationin the state-of-the-art nanoscale CMOS technology. He is currentlyengaged in the field of reliability and fault-tolerant design of nanometer-scalesystems. His current research interests include mixed-signal gate and systemlevel design, reliability evaluation, and optimization. Dr. Stanisavljevic receiveda Scholarship for Students with Extraordinary Results Awarded bythe Serbian Ministry of Education from 1996 to 2004.Alexandre Schmid received the M.S. degree in Microengineering and thePh.D. degree in Electrical Engineering from the Swiss Federal Institute ofTechnology (EPFL) in 1994 and 2000, respectively. He has been with theEPFL since 1994, working at the Integrated Systems Laboratory as a researchand teaching assistant, and at the Electronics Laboratories as a post-doctoralfellow. He joined the Microelectronic Systems Laboratory in 2002 as a SeniorResearch Associate, where he has been conducting research in the fields ofnon-conventional signal processing hardware, nanoelectronic reliability, bioelectronicand brain-machine interfaces. Dr. Schmid has published over 70peer-reviewed journal and conference papers. He has served in the conferencecommittee of The International Conference on Nano-Networks since 2006, astechnical program chair in 2008, and general chair in 2009.Dr. Schmid is anAssociate Editor of the IEICE ELEX. Dr. Schmid is also teaching at the Microengineeringand Electrical Engineering Departments/Sections of EPFL.Yusuf Leblebici received his B.Sc. and M.Sc. degrees in electrical engineeringfrom Istanbul Technical University, in 1984 and in 1986, respectively, andhis Ph.D. degree in electrical and computer engineering from the Universityof Illinois at Urbana-Champaign (UIUC) in 1990. Between 1991 and 2001,he worked as a faculty member at UIUC, at Istanbul Technical University,and at Worcester Polytechnic Institute (WPI). In 2000-2001, he also servedas the Microelectronics Program Coordinator at Sabanci University.Since 2002, Dr. Leblebici has been a Chair Professor at the Swiss FederalInstitute of Technology in Lausanne (EPFL), and director of MicroelectronicSystems Laboratory. His research interests include design of high-speedCMOS digital and mixed-signal integrated circuits, computer-aided design ofVLSI systems, intelligent sensor interfaces, modeling and simulation of semiconductordevices, and VLSI reliability analysis.He is the coauthor of 4 textbooks, namely, Hot-Carrier Reliability of MOSVLSI Circuits (Kluwer Academic Publishers, 1993), CMOS Digital IntegratedCircuits: Analysis and Design (McGraw Hill, 1st Edition 1996, 2nd Edition1998, 3rd Edition 2002), CMOS Multichannel Single-Chip Receivers forMulti-Gigabit Optical Data Communications (Springer, 2007) and Fundamentalsof High Frequency CMOS Analog Integrated Circuits (CambridgeUniversity Press, 2009), as well as more than 200 articles published in variousjournals and conferences.He has served as an Associate Editor of IEEE Transactions on Circuits andSystems (II), and IEEE Transactions on Very Large Scale Integrated (VLSI)Systems. He has also served as the general co-chair of the 2006 EuropeanSolid-State Circuits Conference, and the 2006 European Solid State DeviceResearch Conference (ESSCIRC/ESSDERC). He is a Fellow of IEEE andhas been elected as Distinguished Lecturer of the IEEE Circuits and SystemsSociety for 2010-2011.
Textul de pe ultima copertă
Reliability of Nanoscale Circuits and Systems: Methodologies and Circuit ArchitecturesMilos StanisavljevicAlexandre SchmidYusuf LeblebiciFuture integrated circuits are expected to be made of emerging nanodevices and their associated interconnects, but the reliability of such components is a major threat to the design of future integrated computing systems. Reliability of Nanoscale Circuits and Systems: Methodologies and Circuit Architectures confronts that challenge.The first part discusses the state-of-the-art of the circuits and systems as well as the architectures and methodologies focusing the enhancement of the reliability of digital integrated circuits. It proposes circuit and system level solutions to overcome high defect density and presents reliability, fault models and fault tolerance. It includes an overview of nano-technologies that are considered in the fabrication of future integrated circuits and covers solutions provided in the early ages of CMOs as well as recent techniques.The second part of the text analyzes original circuit and system level solutions. It details an architecture suitable for circuit-level and gate-level redundant modules implementation and exhibiting significant immunity to permanent and random failures as well as unwanted fluctuation and the fabrication parameters. It also proposes a novel general method enabling the introduction of fault-tolerance and evaluation of the circuit and architecture reliability. And the third part proposes a new methodology that introduces reliability in existing design flows. That methodology consists of partitioning the full system to design into reliability optimal partitions and applying reliability evaluation and optimization at local and system level.
Caracteristici
Includes supplementary material: sn.pub/extras