Synchronous Equivalence: Formal Methods for Embedded Systems
Autor Harry Hsieh, Felice Balarin, Alberto L. Sangiovanni-Vincentellien Limba Engleză Paperback – 5 noi 2012
The goal of this book is to investigate how formal methods can be applied to the domain of embedded system design. The emphasis is on the specification, representation, validation, and design exploration of such systems from a high-level perspective. The authors review the framework upon which the theories and experiments are based, and through which the formal methods are linked to synthesis and simulation.
A formal verification methodology is formulated to verify general properties of the designs and demonstrate that this methodology is efficient in dealing with the problem of complexity and effective in finding bugs. However, manual intervention in the form of abstraction selection and separation of timing and functionality is required. It is conjectured that, for specific properties, efficient algorithms exist for completely automatic formal validations of systems.
Synchronous Equivalence: Formal Methods for Embedded Systems presents a brand new formal approach to high-level equivalence analysis. It opens design exploration avenues previously uncharted. It is a work that can stand alone but at the same time is fully compatible with the synthesis and simulation framework described in another book by Kluwer Academic Publishers Hardware-Software Co-Design of Embedded Systems: The POLIS Approach, by Balarin et al.
Synchronous Equivalence: Formal Methods for Embedded Systems will be of interest to embedded system designers (automotive electronics, consumer electronics, and telecommunications), micro-controller designers, CAD developers and students, as well as IP providers, architecture platform designers, operating system providers, and designers of VLSI circuits and systems.
Toate formatele și edițiile | Preț | Express |
---|---|---|
Paperback (1) | 633.35 lei 6-8 săpt. | |
Springer Us – 5 noi 2012 | 633.35 lei 6-8 săpt. | |
Hardback (1) | 658.22 lei 6-8 săpt. | |
Springer Us – 31 dec 2000 | 658.22 lei 6-8 săpt. |
Preț: 633.35 lei
Preț vechi: 745.11 lei
-15% Nou
Puncte Express: 950
Preț estimativ în valută:
121.20€ • 125.77$ • 101.31£
121.20€ • 125.77$ • 101.31£
Carte tipărită la comandă
Livrare economică 17-31 martie
Preluare comenzi: 021 569.72.76
Specificații
ISBN-13: 9781461356646
ISBN-10: 1461356644
Pagini: 152
Ilustrații: XI, 136 p.
Dimensiuni: 155 x 235 x 8 mm
Greutate: 0.22 kg
Ediția:Softcover reprint of the original 1st ed. 2001
Editura: Springer Us
Colecția Springer
Locul publicării:New York, NY, United States
ISBN-10: 1461356644
Pagini: 152
Ilustrații: XI, 136 p.
Dimensiuni: 155 x 235 x 8 mm
Greutate: 0.22 kg
Ediția:Softcover reprint of the original 1st ed. 2001
Editura: Springer Us
Colecția Springer
Locul publicării:New York, NY, United States
Public țintă
ResearchCuprins
1. Introduction.- 1. Emergence of Embedded Systems.- 2. Design of Embedded Systems.- 3. Requirements For An Effective Design Methodology.- 4. Proposed Design Approach.- 5. Motivation.- 6. Overview.- 2. The Polis Codesign Framework.- 1. The Polis Codesign Methodology.- 3. Codesign Finite State Machines.- 1. Background.- 2. CFSMs: Semantics.- 3. Mathematical Model.- 4. Formal Verification of CFSM Specifications.- 1. Verification Methodology.- 2. Verification Example: Seat Belt Alarm Controller.- 3. Verification Example: Shock Absorber Controller.- 4. Conclusions.- 5. Synchronous Equivalence.- 1. Motivation.- 2. The Synchronous Assumption and Synchronous Equivalence.- 3. Design Exploration Methodology.- 4. Analyzing Synchronous Equivalence.- 6. Static Equivalence Analysis.- 1. Scheduling Policy Analysis.- 2. System Graph Analysis.- 3. Mixed Analysis.- 4. Analysis of Heterogeneous Architectures.- 5. Conclusions.- 7. Communication Analysis.- 1. Execution Trace.- 2. Abstracting Communication.- 3. Conclusions.- 8. Refining Communication Analysis.- 1. Container Refinement.- 2. State Refinement.- 3. Pruning Execution Covers.- 4. Relationship with Exact Simulation.- 9. Conclusions and Future Directions.- 1. Conclusions.- 2. Future Directions.