Transient and Permanent Error Control for Networks-on-Chip
Autor Qiaoyan Yu, Paul Ampaduen Limba Engleză Paperback – 25 ian 2014
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Specificații
ISBN-13: 9781489991935
ISBN-10: 148999193X
Pagini: 172
Ilustrații: XII, 160 p.
Dimensiuni: 155 x 235 x 9 mm
Greutate: 0.25 kg
Ediția:2012
Editura: Springer
Colecția Springer
Locul publicării:New York, NY, United States
ISBN-10: 148999193X
Pagini: 172
Ilustrații: XII, 160 p.
Dimensiuni: 155 x 235 x 9 mm
Greutate: 0.25 kg
Ediția:2012
Editura: Springer
Colecția Springer
Locul publicării:New York, NY, United States
Public țintă
ResearchCuprins
Introduction.- Existing Transient and Permanent Error Management in NoCs.- Adaptive Error Control Coding at Datalink Layer.- Transient and Permanent Link Errors Co-Management.- Dual-Layer Cooperative Error Control for Transient Error.- A Flexible Parallel Simulator for Networks-on-Chip with Error Control.- Conclusions and Future Directions.
Textul de pe ultima copertă
This book addresses reliability and energy efficiency of on-chip networks using a configurable error control coding (ECC) scheme for datalink-layer transient error management. The method can adjust both error detection and correction strengths at runtime by varying the number of redundant wires for parity-check bits. Methods are also presented to tackle joint transient and permanent error correction, exploiting the redundant resources already available on-chip. A parallel and flexible network simulator is also introduced, which facilitates examining the impact of various error control methods on network-on-chip performance.
- Includes a complete survey of error control methods for reliable networks-on-chip, evaluated for reliability, energy and performance metrics;
- Provides analysis of error control in various network-on-chip layers, as well as presentation of an innovative multi-layer error control coding technique;
- Presents state-of-the-art solutions to address simultaneously reliability, energy and performance;
- Describes configurable error management solutions and their hardware implementation details for variable noise conditions;
- Provides details of a flexible and parallel NoC simulator and corresponding simulation setup to achieve the reported results.
Caracteristici
Includes a complete survey of error control methods for reliable networks-on-chip, evaluated for reliability, energy and performance metrics Presents state-of-the-art solutions to address simultaneously reliability, energy and performance Provides hardware implementation details of error control in networks-on-chip Provides details of a parallel simulator and corresponding simulation setup to achieve the reported results