Cantitate/Preț
Produs
Total produse
Vezi coșul
A Roadmap for Formal Property Verification de Pallab Dasgupta

A Roadmap for Formal Property Verification

Autor Pallab Dasgupta
en Limba Engleză Paperback – 19 oct 2010
Integrating formal property verification (FPV) into an existing design process raises several interesting questions. Have I written enough properties? Have I written a consistent set of properties? What should I do when the FPV tool runs into capacity issues? This book develops the answers to these questions and fits them into a roadmap for formal property verification – a roadmap that shows how to glue FPV technology into the traditional validation flow. A Roadmap for Formal Property Verification explores the key issues in this powerful technology through simple examples – you do not need any background on formal methods to read most parts of this book.
Citește tot Restrânge

Toate formatele și edițiile

Toate formatele și edițiile Preț Express
Paperback (1) 62078 lei  6-8 săpt.
  SPRINGER NETHERLANDS – 19 oct 2010 62078 lei  6-8 săpt.
Hardback (1) 62918 lei  6-8 săpt.
  SPRINGER NETHERLANDS – 5 iul 2006 62918 lei  6-8 săpt.

Preț: 62078 lei

Preț vechi: 73033 lei
-15% Nou

Puncte Express: 931
Preț estimativ în valută:
11880€ • 12494$ • 9926£

Carte tipărită la comandă

Livrare economică 08-22 ianuarie 25

 Adaugă în coș

Wish list
Gift list
Am citit!
Adaugă în listă
Preluare comenzi: 021 569.72.76

Specificații

ISBN-13: 9789048171859
ISBN-10: 9048171857
Pagini: 268
Ilustrații: XIV, 252 p.
Dimensiuni: 160 x 240 x 14 mm
Greutate: 0.38 kg
Ediția:Softcover reprint of hardcover 1st ed. 2006
Editura: SPRINGER NETHERLANDS
Colecția Springer
Locul publicării:Dordrecht, Netherlands

Public țintă

Research

Cuprins

Languages for Temporal Properties.- How Does the Property Checker Work?.- Is My Specification Consistent?.- Have I Written Enough Properties?.- Design Intent Coverage.- Test Generation Games.- A Roadmap for Formal Property Verification.

Recenzii

"This book is a "must-read" for anyone who needs a broad and deep understanding of  assertion-based verification technology and methodology. It gives an in-depth overview of the logic behind, and algorithms for, reasoning about design behavior using assertions. The book also presents advanced methods for checking consistency and coverage of an assertion-based specification, for maintaining completeness of a specification as it is refined, and for leveraging assertions for automatic test generation in constrained random simulation.
Detailing both established practice and recent developments, "A Roadmap for Formal Property Verification" is a valuable reference for insight into both the present and the future of assertion-based verification." (Erich Marschner, Senior Architect, Systems and Functional Verification, Cadence Design Systems, and Co-Chair, Accellera Formal Verification Technical Committee (FVTC)

Notă biografică

The author leads the Formal Verification Group at the Indian Institute of Technology, Kharagpur (http://www.facweb.iitkgp.ernet.in/~pallab/forverif.html). He has collaborations with leading companies, including Intel, Sun Microsystems, Synopsys, Texas Instruments, National Semiconductors, General Motors, Interra Systems and Virtio Corp, on developing formal methods for design verification. The author is a senior member of IEEE.

Caracteristici

FPV methods - presented conceptually Architecting assertion suites with System Verilog Assertions Formal verification coverage Consistency issues in formal specifications Design Intent Coverage Intelligent test generation from formal specifications