Co-Design for System Acceleration: A Quantitative Approach
Editat de Nadia Nedjah, Luiza Mourelleen Limba Engleză Paperback – 6 noi 2010
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Specificații
ISBN-13: 9789048173884
ISBN-10: 9048173884
Pagini: 252
Ilustrații: XIX, 229 p.
Dimensiuni: 155 x 235 x 13 mm
Greutate: 0.36 kg
Ediția:Softcover reprint of hardcover 1st ed. 2007
Editura: SPRINGER NETHERLANDS
Colecția Springer
Locul publicării:Dordrecht, Netherlands
ISBN-10: 9048173884
Pagini: 252
Ilustrații: XIX, 229 p.
Dimensiuni: 155 x 235 x 13 mm
Greutate: 0.36 kg
Ediția:Softcover reprint of hardcover 1st ed. 2007
Editura: SPRINGER NETHERLANDS
Colecția Springer
Locul publicării:Dordrecht, Netherlands
Public țintă
ResearchCuprins
The Co-design Methodology.- The Co-design System.- VHDL Model of the Co-design System.- Shared Memory Configuration.- Dual-port Memory Configuration.- Cache Memory Configuration.- Advanced Topics and Further Research.
Textul de pe ultima copertă
In Co-Design for System Acceleration, we are concerned with studying the co-design methodology, in general, and how to determine the more suitable interface mechanism in a co-design system, in particular. This will be based on the characteristics of the application and those of the target architecture of the system. We provide guidelines to support the designer's choice of the interface mechanism. The content of Co-Design for System Acceleration is divided into eight chapters. We present co-design as a methodology for the integrated design of systems implemented using both hardware and software components. This includes high-level synthesis and the new technologies available for its implementation. The physical co-design system is then presented. The development route adopted is discussed and the target architecture described. The relation between the execution times and the interface mechanisms is analyzed. In order to investigate the performance of the co-designsystem for different characteristics of the application and of the architecture, we developed a VHDL model of our co-design system. The timing characteristics of the system are introduced, that is times for parameter passing and bus arbitration for each interface mechanism, together with their handshake completion times. The relation between the coprocessor memory accesses and the interface mechanisms is then studied. Several memory configurations are presented and studied: single-port memory, dual-port memory and cache memory. We also introduce some new trends in co-design and system acceleration.
Caracteristici
Written by an academic but is applicable to professionals from industry Topics as co-design methodology and how to determine the more suitable interface mechanism in a co-design system are discussed Will be based on the characteristics of the application and those of the target architecture of the system