DSP Architecture Design Essentials: Electrical Engineering Essentials
Autor Dejan Marković, Robert W. Brodersenen Limba Engleză Hardback – 10 iul 2012
The key feature of this text is a design methodology based on a high-level design model that leads to hardware implementation with minimum power and area. The methodology includes algorithm-level considerations such as automated word-length reduction and intrinsic data properties that can be leveraged to reduce hardware complexity. From a high-level data-flow graph model, an architecture exploration methodology based on linear programming is used to create an array of architectural solutions tailored to the underlying hardware technology.
The book is supplemented with online material: bibliography, design examples, CAD tutorials and custom software.
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Specificații
ISBN-13: 9781441996596
ISBN-10: 1441996591
Pagini: 353
Ilustrații: XIV, 351 p. 603 illus., 452 illus. in color. With online files/update.
Dimensiuni: 210 x 279 x 23 mm
Greutate: 1.2 kg
Ediția:2012
Editura: Springer Us
Colecția Springer
Seria Electrical Engineering Essentials
Locul publicării:New York, NY, United States
ISBN-10: 1441996591
Pagini: 353
Ilustrații: XIV, 351 p. 603 illus., 452 illus. in color. With online files/update.
Dimensiuni: 210 x 279 x 23 mm
Greutate: 1.2 kg
Ediția:2012
Editura: Springer Us
Colecția Springer
Seria Electrical Engineering Essentials
Locul publicării:New York, NY, United States
Public țintă
Professional/practitionerCuprins
Energy and Delay Models.- Circuit Optimization.- Architectural Techniques.- Architecture Flexibility.- Arithmetic for DSP.- CORDIC, Divider, Square Root.- Digital Filters.- Time-Frequency Analysis.- Data-Flow Graph Model.- Wordlength Optimization.- Architectural Optimization.- Simulink-Hardware Flow.- Multi-GHz Radio DSP.- Dedicated MHz-rate Decoders.- Flexible MHz-rate Decoder.- kHz-rate Neural Processors.- Brief Outlook.
Textul de pe ultima copertă
In DSP Architecture Design Essentials, authors Dejan Marković and Robert W. Brodersen cover a key subject for the successful realization of DSP algorithms for communications, multimedia, and healthcare applications. The book addresses the need for DSP architecture design that maps advanced DSP algorithms to hardware in the most power- and area-efficient way.
The key feature of this text is a design methodology based on a high-level design model that leads to hardware implementation with minimum power and area. The methodology includes algorithm-level considerations such as automated word-length reduction and intrinsic data properties that can be leveraged to reduce hardware complexity. From a high-level data-flow graph model, an architecture exploration methodology based on linear programming is used to create an array of architectural solutions tailored to the underlying hardware technology.
The book is supplemented with online material: bibliography, design examples, CAD tutorials and custom software.
The key feature of this text is a design methodology based on a high-level design model that leads to hardware implementation with minimum power and area. The methodology includes algorithm-level considerations such as automated word-length reduction and intrinsic data properties that can be leveraged to reduce hardware complexity. From a high-level data-flow graph model, an architecture exploration methodology based on linear programming is used to create an array of architectural solutions tailored to the underlying hardware technology.
The book is supplemented with online material: bibliography, design examples, CAD tutorials and custom software.
Caracteristici
Addresses the gap between DSP algorithm design and hardware implementation Presents a methodology for power- and area-efficient architecture design Done in close interaction with leading industrial researchers Design methodology is verified on a number of chips Uses a high-level Matlab/Simulink description Online access to tutorials, examples, and software