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High Performance Memory Systems

Editat de Haldun Hadimioglu, David Kaeli, Jeffrey Kuskin, Ashwini Nanda, Josep Torrellas
en Limba Engleză Paperback – 16 sep 2012
The State of Memory Technology Over the past decade there has been rapid growth in the speed of micropro­ cessors. CPU speeds are approximately doubling every eighteen months, while main memory speed doubles about every ten years. The International Tech­ nology Roadmap for Semiconductors (ITRS) study suggests that memory will remain on its current growth path. The ITRS short-and long-term targets indicate continued scaling improvements at about the current rate by 2016. This translates to bit densities increasing at two times every two years until the introduction of 8 gigabit dynamic random access memory (DRAM) chips, after which densities will increase four times every five years. A similar growth pattern is forecast for other high-density chip areas and high-performance logic (e.g., microprocessors and application specific inte­ grated circuits (ASICs)). In the future, molecular devices, 64 gigabit DRAMs and 28 GHz clock signals are targeted. Although densities continue to grow, we still do not see significant advances that will improve memory speed. These trends have created a problem that has been labeled the Memory Wall or Memory Gap.
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Specificații

ISBN-13: 9781461264774
ISBN-10: 1461264774
Pagini: 312
Ilustrații: XII, 297 p.
Dimensiuni: 155 x 235 x 16 mm
Greutate: 0.44 kg
Ediția:Softcover reprint of the original 1st ed. 2004
Editura: Springer
Colecția Springer
Locul publicării:New York, NY, United States

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Cuprins

1 Introduction to High-Performance Memory Systems — scan all.- 1.1 Coherence, Synchronization, and Allocation.- 1.2 Power-Aware, Reliable, and Reconfigurable Memory.- 1.3 Software-Based Memory Tuning.- 1.4 Architecture-Based Memory Tuning.- 1.5 Workload Considerations.- I Coherence, Synchronization, and Allocation.- 2 Speculative Locks: Concurrent Execution of Critical Sections in Shared-Memory Multiprocessors.- 3 Dynamic Verification of Cache Coherence Protocols.- 4 Timestamp-Based Selective Cache Allocation.- II Power-Aware, Reliable, and Reconfigurable Memory.- 5 Power-Efficient Cache Coherence.- 6 Improving Power Efficiency with an Asymmetric Set-Associative Cache.- 7 Memory Issues in Hardware-Supported Software Safety.- 8 Reconfigurable Memory Module in the RAMP System for Stream Processing.- III Software-Based Memory Tuning.- 9 Performance of Memory Expansion Technology (MXT).- 10 Profile-Tuned Heap Access.- 11 Array Merging: A Technique for Improving Cache and TLB Behavior.- 12 Software Logging under Speculative Parallelization.- IV Architecture-Based Memory Tuning.- 13 An Analysis of Scalar Memory Accesses in Embedded and Multimedia Systems.- 14 Bandwidth-Based Prefetching for Constant-Stride Arrays.- 15 Performance Potential of Effective Address Prediction of Load Instructions.- V Workload Considerations.- 16 Evaluating Novel Memory System Alternatives for Speculative Multithreaded Computer Systems.- 17 Evaluation of Large L3 Caches Using TPC-H Trace Samples.- 18 Exploiting Intelligent Memory for Database Workloads.- Author Index.

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Today, the more rapid rate of speed increase in microprocessor technology than in memory has created a serious memory gap (or "wall") for computer designers and manufacturers.
Edited by leading international authorities in the field, High Performance Memory Systems surveys advances in technology, architecture, and algorithms that address both scalability needs in multiprocessors and the expanding gap between CPU/network and memory speeds. The range of approaches described here address issues present on uni-processor systems as well as on multi-processor systems. Current research highlights from both industry and academia focus on: coherence, synchronization, and allocation; power-awareness, reliability, and reconfigurability; software-based memory tuning; architecture design issues; and workload considerations.
Topics and features:
* Describes leading-edge research relevant to the growing disparity between CPU and memory speed
* Provides theoretical and practical approaches to the memory-wall problem, including some from recent worldwide symposiums on the topic
* Includes specific solutions to common problems in different operating environments
* Offers a broad overview of high performance memory systems, as well as in-depth discussions of select, essential areas
* Includes a concise, thorough introductory chapter about the field

This unique and comprehensive compendium assembles the work by leading researchers and professionals into aspects of improving the memory-system performance of general-purpose programs. It is ideally suited for researchers and R&D professionals with interests, or practice, in computer engineering, computer architecture, memory design, and general processor architecture.