Reconfigurable Computing: Architectures, Tools and Applications: Third International Workshop, ARC 2007, Mangaratiba, Brazil, March 27-29, 2007, Proceedings: Lecture Notes in Computer Science, cartea 4419
Editat de Pedro C. Diniz, Eduardo Marques, Koen Bertels, Marcio Merino Fernandes, Joao M.P. Cardosoen Limba Engleză Paperback – 19 mar 2007
Din seria Lecture Notes in Computer Science
- 20% Preț: 741.34 lei
- 20% Preț: 340.22 lei
- 20% Preț: 343.43 lei
- 20% Preț: 315.18 lei
- 20% Preț: 327.41 lei
- 20% Preț: 1031.06 lei
- 20% Preț: 438.67 lei
- 20% Preț: 315.76 lei
- 20% Preț: 330.61 lei
- 20% Preț: 148.66 lei
- 20% Preț: 122.89 lei
- 20% Preț: 995.03 lei
- 20% Preț: 562.71 lei
- 20% Preț: 237.99 lei
- 20% Preț: 504.57 lei
- 20% Preț: 332.20 lei
- 15% Preț: 563.85 lei
- 20% Preț: 636.26 lei
- 5% Preț: 365.59 lei
- 20% Preț: 321.95 lei
- 20% Preț: 310.26 lei
- 20% Preț: 607.38 lei
- Preț: 370.38 lei
- 20% Preț: 172.68 lei
- 20% Preț: 315.76 lei
- 20% Preț: 662.78 lei
- 20% Preț: 256.26 lei
- 20% Preț: 440.36 lei
- 20% Preț: 626.79 lei
- 20% Preț: 566.70 lei
- 17% Preț: 360.19 lei
- 20% Preț: 309.90 lei
- 20% Preț: 579.38 lei
- 20% Preț: 301.94 lei
- 20% Preț: 307.71 lei
- 20% Preț: 369.12 lei
- 20% Preț: 330.61 lei
- 20% Preț: 1044.38 lei
- 20% Preț: 574.58 lei
- Preț: 399.17 lei
- 20% Preț: 802.24 lei
- 20% Preț: 569.11 lei
- 20% Preț: 1374.12 lei
- 20% Preț: 333.84 lei
- 20% Preț: 538.29 lei
- 20% Preț: 326.97 lei
Preț: 329.48 lei
Preț vechi: 411.85 lei
-20% Nou
Puncte Express: 494
Preț estimativ în valută:
63.06€ • 65.73$ • 52.50£
63.06€ • 65.73$ • 52.50£
Carte tipărită la comandă
Livrare economică 04-18 ianuarie 25
Preluare comenzi: 021 569.72.76
Specificații
ISBN-13: 9783540714309
ISBN-10: 3540714308
Pagini: 412
Ilustrații: XIV, 394 p.
Dimensiuni: 155 x 235 x 22 mm
Greutate: 0.6 kg
Ediția:2007
Editura: Springer Berlin, Heidelberg
Colecția Springer
Seriile Lecture Notes in Computer Science, Theoretical Computer Science and General Issues
Locul publicării:Berlin, Heidelberg, Germany
ISBN-10: 3540714308
Pagini: 412
Ilustrații: XIV, 394 p.
Dimensiuni: 155 x 235 x 22 mm
Greutate: 0.6 kg
Ediția:2007
Editura: Springer Berlin, Heidelberg
Colecția Springer
Seriile Lecture Notes in Computer Science, Theoretical Computer Science and General Issues
Locul publicării:Berlin, Heidelberg, Germany
Public țintă
ResearchCuprins
Architectures [Regular Papers].- Architectural Exploration of the ADRES Coarse-Grained Reconfigurable Array.- A Configurable Multi-ported Register File Architecture for Soft Processor Cores.- MT-ADRES: Multithreading on Coarse-Grained Reconfigurable Architecture.- Asynchronous ARM Processor Employing an Adaptive Pipeline Architecture.- Partially Reconfigurable Point-to-Point Interconnects in Virtex-II Pro FPGAs.- Systematic Customization of On-Chip Crossbar Interconnects.- Authentication of FPGA Bitstreams: Why and How.- Architectures [Short Papers].- Design of a Reversible PLD Architecture.- Designing Heterogeneous FPGAs with Multiple SBs.- Mapping Techniques and Tools [Regular Papers].- Partial Data Reuse for Windowing Computations: Performance Modeling for FPGA Implementations.- Optimized Generation of Memory Structure in Compiling Window Operations onto Reconfigurable Hardware.- Adapting and Automating XILINX’s Partial Reconfiguration Flow for Multiple Module Implementations.- A Linear Complexity Algorithm for the Automatic Generation of Convex Multiple Input Multiple Output Instructions.- Evaluating Variable-Grain Logic Cells Using Heterogeneous Technology Mapping.- The Implementation of a Coarse-Grained Reconfigurable Architecture with Loop Self-pipelining.- Hardware/Software Codesign for Embedded Implementation of Neural Networks.- Synthesis of Regular Expressions Targeting FPGAs: Current Status and Open Issues.- Mapping Techniques and Tools [Short Papers].- About the Importance of Operation Grouping Procedures for Multiple Word-Length Architecture Optimizations.- Arithmetic [Regular Papers].- Switching Activity Models for Power Estimation in FPGA Multipliers.- Multiplication over on FPGA: A Survey.- A Parallel Version of the Itoh-Tsujii MultiplicativeInversion Algorithm.- A Fast Finite Field Multiplier.- Applications [Regular Papers].- Combining Flash Memory and FPGAs to Efficiently Implement a Massively Parallel Algorithm for Content-Based Image Retrieval.- Image Processing Architecture for Local Features Computation.- A Compact Shader for FPGA-Based Volume Rendering Accelerators.- Ubiquitous Evolvable Hardware System for Heart Disease Diagnosis Applications.- FPGA-Accelerated Molecular Dynamics Simulations: An Overview.- Reconfigurable Hardware Acceleration of Canonical Graph Labelling.- Reconfigurable Computing for Accelerating Protein Folding Simulations.- Reconfigurable Parallel Architecture for Genetic Algorithms: Application to the Synthesis of Digital Circuits.- Applications [Short Papers].- A Space Variant Mapping Architecture for Reliable Car Segmentation.- A Hardware SAT Solver Using Non-chronological Backtracking and Clause Recording Without Overheads.- Searching the Web with an FPGA Based Search Engine.- An Acceleration Method for Evolutionary Systems Based on Iterated Prisoner’s Dilemma.- Real Time Architectures for Moving-Objects Tracking.- Reconfigurable Hardware Evolution Platform for a Spiking Neural Network Robotics Controller.- Multiple Sequence Alignment Using Reconfigurable Computing.- Simulation of the Dynamic Behavior of One-Dimensional Cellular Automata Using Reconfigurable Computing.