Relaxation Techniques for the Simulation of VLSI Circuits: The Springer International Series in Engineering and Computer Science, cartea 20
Autor Jacob K. White, Alberto L. Sangiovanni-Vincentellien Limba Engleză Paperback – 26 sep 2011
Toate formatele și edițiile | Preț | Express |
---|---|---|
Paperback (1) | 641.67 lei 6-8 săpt. | |
Springer Us – 26 sep 2011 | 641.67 lei 6-8 săpt. | |
Hardback (1) | 647.93 lei 6-8 săpt. | |
Springer Us – 30 noi 1986 | 647.93 lei 6-8 săpt. |
Din seria The Springer International Series in Engineering and Computer Science
- 24% Preț: 1041.98 lei
- 20% Preț: 643.50 lei
- 18% Preț: 1225.62 lei
- 18% Preț: 965.02 lei
- 20% Preț: 646.12 lei
- 18% Preț: 948.79 lei
- 20% Preț: 646.62 lei
- 15% Preț: 637.46 lei
- 20% Preț: 643.83 lei
- 18% Preț: 949.23 lei
- 20% Preț: 644.48 lei
- 20% Preț: 994.92 lei
- 20% Preț: 645.97 lei
- 18% Preț: 946.87 lei
- 20% Preț: 995.57 lei
- 18% Preț: 956.99 lei
- 20% Preț: 644.98 lei
- 15% Preț: 649.54 lei
- 18% Preț: 950.21 lei
- 18% Preț: 1221.38 lei
- 18% Preț: 957.62 lei
- 15% Preț: 643.99 lei
- 18% Preț: 948.47 lei
- 18% Preț: 947.35 lei
- 20% Preț: 1284.65 lei
- 20% Preț: 1628.31 lei
- 20% Preț: 1285.78 lei
Preț: 641.67 lei
Preț vechi: 802.08 lei
-20% Nou
Puncte Express: 963
Preț estimativ în valută:
122.80€ • 127.73$ • 101.38£
122.80€ • 127.73$ • 101.38£
Carte tipărită la comandă
Livrare economică 14-28 aprilie
Preluare comenzi: 021 569.72.76
Specificații
ISBN-13: 9781461294023
ISBN-10: 1461294029
Pagini: 220
Ilustrații: XII, 202 p.
Dimensiuni: 155 x 235 x 12 mm
Greutate: 0.31 kg
Ediția:1987
Editura: Springer Us
Colecția Springer
Seria The Springer International Series in Engineering and Computer Science
Locul publicării:New York, NY, United States
ISBN-10: 1461294029
Pagini: 220
Ilustrații: XII, 202 p.
Dimensiuni: 155 x 235 x 12 mm
Greutate: 0.31 kg
Ediția:1987
Editura: Springer Us
Colecția Springer
Seria The Springer International Series in Engineering and Computer Science
Locul publicării:New York, NY, United States
Public țintă
ResearchCuprins
1 — Introduction.- Section 1.1 — Simulation For IC Design.- Section 1.2 — Circuit Simulation.- Section 1.3 — Standard Circuit Simulators.- Section 1.4 — Relaxation-Based Circuit Simulators.- Section 1.5 — Notation.- 2 — The Circuit Simulation Problem.- Section 2.1 — Formulation of the Equations.- Section2.1.1 — Branch Equations.- Section 2.1.2 — KCL and KVL.- Section 2.1.3 — Nodal Analysis.- Section 2.1.4 — Extending The Nodal Analysis Technique.- Section 2.2 — Mathematical Properties of the Equations.- Section 2.2.1 — Existence of Solutions.- Section 2.2.2 — Diagonal Dominance and the Capacitance Matrix.- Section 2.2.3 — Resistor-and-Grounded-Capacitor (RGC) Networks.- Section 2.3 — Numerical Integration Properties.- Section 2.3.1 — Consistency, Stability, and Convergence.- Section 2.3.2 — Stiffness and A-Stability.- Section 2.3.3 — Charge Conservation.- Section 2.3.4 — Domain of Dependence.- 3 — Numerical Techniques.- Section 3.1 — Numerical Integration in General-Purpose Simulators.- Section 3.2 — Properties of Multistep Integration Methods.- Section 3.3 — Relaxation Decomposition.- Section 3.4 — Semi-Implicit Numerical Integration Methods.- Section 3.5 — Relaxation Versus Semi-Implicit Integration.- 4 — Waveform Relaxation.- Section 4.1 — The Basic WR Algorithm.- Section 4.2 — Convergence Proof for the Basic WR Algorithm.- Section 4.3 — Waveform Relaxation-Newton Methods.- Section 4.4 — Nonstationary WR Algorithms.- 5 — Accelerating WR Convergence.- Section 5.1 — Uniformity of WR Convergence.- Section 5.2 — Partitioning Large Systems.- Section 5.3 — Ordering the Equations.- 6 — Discretized WR Algorithms.- Section 6.1 — The Global-Timestep Case.- Section 6.2 — Fixed Global-Timestep WRConvergence Theorem.- Section 6.3 — The Multirate WR Convergence Theorem.- 7 — The Implementation of WR.- Section 7.1 — Partitioning Mos Circuits.- Section 7.2 — Ordering the Subsystem Computation.- Section 7.3 — Computation of the Subsystem Waveforms.- Section 7.4 — Window Size Determination.- Section 7.5 — Partial Waveform Convergence.- Section 7.6 — Experimental Results.- 8 — Parallel WR Algorithms.- Section 8.1 — An Overview of the Shared-Memory Computer.- Section 8.2 — Mixed Seidel/Jacobi Parallel WR Algorithm.- Section 8.3 — Timepoint-Pipelining WR Algorithm.- Section 8.4 — Parallel Algorithm Test Results.- References.