VHDL: Hardware Description and Design
Autor Roger Lipsett, Carl F. Schaefer, Cary Usseryen Limba Engleză Paperback – 22 ian 2012
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Specificații
ISBN-13: 9781461289012
ISBN-10: 1461289017
Pagini: 324
Ilustrații: XX, 299 p.
Dimensiuni: 155 x 235 x 17 mm
Greutate: 0.45 kg
Ediția:Softcover reprint of the original 1st ed. 1989
Editura: Springer Us
Colecția Springer
Locul publicării:New York, NY, United States
ISBN-10: 1461289017
Pagini: 324
Ilustrații: XX, 299 p.
Dimensiuni: 155 x 235 x 17 mm
Greutate: 0.45 kg
Ediția:Softcover reprint of the original 1st ed. 1989
Editura: Springer Us
Colecția Springer
Locul publicării:New York, NY, United States
Public țintă
ResearchCuprins
1 — Introduction.- Why VHDL.- Terminology and Conventions.- 2 — A Model of Hardware.- A Model of Behavior.- A Model of Time.- A Model of Structure.- 3 — Basics.- Structure and Behavior.- Data Types and Objects.- Hooking Constructs Together.- Major VHDL Constructs.- Libraries.- 4 — Data Types.- Literals.- Scalar Types.- Composite Types.- Subtypes.- Attributes.- Predefined Operators.- 5 — Behavioral Description.- Process Statements.- Behavioral Modeling — Sequential View.- Behavioral Modeling — Concurrent View.- 6 — Structural Description.- Basic Features of Structural Description.- Regular Structures.- Configuration Specifications.- Default Values and Unconnected Ports.- 7 — Large Scale Design.- Managing Shared Designs.- Visibility and the Analysis Context.- Partitioning a Design.- Sharing Data Within a Design.- Specifying a Design Configuration.- Mixing Structure and Behavior.- 8 — A Complete Example.- The Traffic Light Controller.- Creating the Specification.- Partitioning the Design.- Starting the Implementation.- Setting Up the PLA.- 9 — Advanced Features.- Overloading.- Access Types.- File Types and I/O.- User-Defined Attributes.- Signal-Related Attributes.- Aliases.- Association by Subelement.- Guarded Assignment Statements.- Disconnection Specifications.- Null Transactions.- 10 — VHDL in Use.- A Device Controller.- Setup and Hold Timing.- A Neural Net.- A Systolic Array Multiplier.- Summary.- Appendix A — Predefined Environment261.- Reserved Words.- Attributes.- Type and Subtype Attributes.- Array Attributes.- Signal-Valued Attributes.- Signal-Related Attributes.- Packages.- The Package STANDARD.- The Package TEXTIO.- >Appendix B — VHDL Syntax.- >Appendix C — Suggested Reading.- >Index.
Recenzii
`... this is a most useful publication.'
Journal of Semicustom ICs 8 (3) 1991
Journal of Semicustom ICs 8 (3) 1991