Architecture and Design of Distributed Embedded Systems: IFIP WG10.3/WG10.4/WG10.5 International Workshop on Distributed and Parallel Embedded Systems (DIPES 2000) October 18–19, 2000, Schloß Eringerfeld, Germany: IFIP Advances in Information and Communication Technology, cartea 61
Editat de Bernd Kleinjohannen Limba Engleză Hardback – 30 apr 2001
For the design of embedded systems the designer has to tackle three major aspects:
- The application itself including the man-machine interface,
- The (target) architecture of the system including all functional and non-functional constraints and,
- the design methodology including modelling, specification, synthesis, test and validation.
This book documents the high quality approaches and results that were presented at the International Workshop on Distributed and Parallel Embedded Systems (DIPES 2000), which was sponsored by the International Federation for Information Processing (IFIP), and organised by IFIP working groups WG10.3, WG10.4 and WG10.5. The workshop took place on October 18-19, 2000, in Schloß Eringerfeld near Paderborn, Germany.
Architecture and Design of Distributed Embedded Systems is organised similar to the workshop. Chapters 1 and 4 (Methodology I and II) deal with different modelling and specification paradigms and the corresponding design methodologies. Generic system architectures for different classes of embedded systems are presented in Chapter 2. In Chapter 3 several design environments for the support ofspecific design methodologies are presented. Problems concerning test and validation are discussed in Chapter 5. The last two chapters include distribution and communication aspects (Chapter 6) and synthesis techniques for embedded systems (Chapter 7).
This book is essential reading for computer science researchers and application developers.
Toate formatele și edițiile | Preț | Express |
---|---|---|
Paperback (1) | 956.56 lei 6-8 săpt. | |
Springer Us – 21 mar 2013 | 956.56 lei 6-8 săpt. | |
Hardback (1) | 962.67 lei 6-8 săpt. | |
Springer Us – 30 apr 2001 | 962.67 lei 6-8 săpt. |
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Specificații
ISBN-13: 9780792373452
ISBN-10: 0792373456
Pagini: 236
Ilustrații: XIV, 238 p.
Dimensiuni: 155 x 235 x 16 mm
Greutate: 0.53 kg
Ediția:2001
Editura: Springer Us
Colecția Springer
Seria IFIP Advances in Information and Communication Technology
Locul publicării:New York, NY, United States
ISBN-10: 0792373456
Pagini: 236
Ilustrații: XIV, 238 p.
Dimensiuni: 155 x 235 x 16 mm
Greutate: 0.53 kg
Ediția:2001
Editura: Springer Us
Colecția Springer
Seria IFIP Advances in Information and Communication Technology
Locul publicării:New York, NY, United States
Public țintă
ResearchCuprins
Content.- A Methodology for Complex Embedded Systems Design: Petri Nets within a UML Approach.- Efficient System Modeling for Complex Real-Time Industrial Networks using the ACCORD/UML Methodology.- Analog/Digital Co-Design.- A Design Methodology for Embedded Systems based on Multiple Processors.- An Architecture for Reliable Distributed Computer-Controlled Systems.- Generic Architecture Platform for Multiprocessor System-On-Chip Design.- JPURE — A Purified Java Execution Environment for Controller Networks.- Optimizing Functional distribution in Complex System Design.- Customizing Software Toolkits for Embedded Systems-On-Chip.- Framework for System Design, Validation and Fast Prototyping of Multiprocessor System-On-Chip.- The Specification Language SpecC within the PARADISE Design Environment.- Real-Time Support for Online Controller Supervision and Optimisation.- A Product Family Approach to Graceful Degradation.- Environment Modelling in Closed Specifications of Embedded Systems.- Test Case Design for the Validation of Component-Based Embedded Systems.- Timing Constraints Validation using UPPAAL: Schedulability Analysis.- A New Dynamic Scheduling Algorithm for Real-Time Multiprocessor Systems.- Deriving Message Passing Protocols from Collective Behavior.- Java Real-Time Publish-Subscribe Middleware for Distributed Embedded Systems.- A Verified Hardware Synthesis of Esterel Programs.- EXPLORA — Generic Design Space Exploration during Embedded System Synthesis.- Automatic Code Generation for Multirate Simulink Models with Support for the OSEK Real-Time Operating System.