Cantitate/Preț
Produs
Total produse
Vezi coșul
Background Calibration of Time-Interleaved Data Converters de Manar El-Chammas

Background Calibration of Time-Interleaved Data Converters: Analog Circuits and Signal Processing

Autor Manar El-Chammas, Boris Murmann
en Limba Engleză Hardback – 16 dec 2011
This book describes techniques for time-interleaving a number of analog-to-digital data converters to achieve demanding bandwidth requirements.  Readers will benefit from the presentation of a low-power solution that can be used in actual products, while alleviating the time-varying signal artifacts that typically arise when implementing such a system architecture.
Citește tot Restrânge

Toate formatele și edițiile

Toate formatele și edițiile Preț Express
Paperback (1) 63515 lei  6-8 săpt.
  Springer – 3 mar 2014 63515 lei  6-8 săpt.
Hardback (1) 63908 lei  6-8 săpt.
  Springer – 16 dec 2011 63908 lei  6-8 săpt.

Din seria Analog Circuits and Signal Processing

Preț: 63908 lei

Preț vechi: 75186 lei
-15% Nou

Puncte Express: 959
Preț estimativ în valută:
12234€ • 12589$ • 10313£

Carte tipărită la comandă

Livrare economică 01-15 martie

 Adaugă în coș

Wish list
Gift list
Am citit!
Adaugă în listă
Preluare comenzi: 021 569.72.76

Specificații

ISBN-13: 9781461415107
ISBN-10: 1461415101
Pagini: 144
Ilustrații: XX, 124 p.
Dimensiuni: 155 x 235 x 15 mm
Greutate: 0.38 kg
Ediția:2012
Editura: Springer
Colecția Springer
Seria Analog Circuits and Signal Processing

Locul publicării:New York, NY, United States

Public țintă

Research

Cuprins

Introduction.- Time-Interleaved ADCs.- Mitigation of Timing Skew.- Architecture Optimization.- Circuit Design.- Measurement Results.- Conclusion.

Textul de pe ultima copertă

This book describes techniques for time-interleaving a number of analog-to-digital data converters to achieve demanding bandwidth requirements.  Readers will benefit from the presentation of a low-power solution that can be used in actual products, while alleviating the time-varying signal artifacts that typically arise when implementing such a system architecture.
  • Discusses time-interleaved ADC theory in detail;
  • Presents and analyzes a full solution for timing-skew in time-interleaved ADCs;
  • Demonstrates how to optimize the design of a time-interleaved ADC for extremely low-power and very high sample rate.
    •  
  • Presents and analyzes a full solution for timing-skew in time-interleaved ADCs;
  • Demonstrates how to optimize the design of a time-interleaved ADC for extremely low-power and very high sample rate.
 

Caracteristici

Discusses time-interleaved ADC theory in detail Presents and analyzes a full solution for timing-skew in time-interleaved ADCs Demonstrates how to optimize the design of a time-interleaved ADC for extremely low-power and very high sample rate Includes supplementary material: sn.pub/extras