Flash Memories
Editat de Paulo Cappelletti, Carla Golla, Piero Olivo, Enrico Zanonien Limba Engleză Paperback – 23 feb 2014
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Specificații
ISBN-13: 9781461372783
ISBN-10: 146137278X
Pagini: 556
Ilustrații: XI, 540 p.
Dimensiuni: 155 x 235 x 29 mm
Greutate: 0.77 kg
Ediția:1999
Editura: Springer Us
Colecția Springer
Locul publicării:New York, NY, United States
ISBN-10: 146137278X
Pagini: 556
Ilustrații: XI, 540 p.
Dimensiuni: 155 x 235 x 29 mm
Greutate: 0.77 kg
Ediția:1999
Editura: Springer Us
Colecția Springer
Locul publicării:New York, NY, United States
Public țintă
ResearchCuprins
1 Flash Memories: An Overview.- 1.1 Role of Non Volatile Memories in Microelectronic Systems and in Semiconductor Market.- 1.2 Evolution of Non-volatile Memories.- 1.3 The Floating Gate Device.- 1 4 Charge Injection Mechanisms.- 1 5 Erasable Programmable Read Only Memories.- 1.6 Electrically Erasable Programmable Read Only Memories.- 1.7 Flash Memories. The Basic ETOX Cell. Programming and Erasing Mechanisms.- 1.8 Memory NOR Architecture and Related Issues.- 1.9 The NAND Flash Mass Storage Concept.- 1.10 Embedded Flash Memories.- 1 11 The Future of Flash Memories.- References.- 2 The Industry Standard Flash Memory Cell.- 2.1 Introduction.- 2.2 Basic Structure.- 2.3 Operating Conditions.- 2.4 Technology and Process.- 2 5 Yield and Reliability.- 2.6 Scaling Issues.- References.- 3 Binary and Multilevel Flash Cells.- 3 1 Introduction to Flash Cell Design.- 3.2 Binary Flash Cells.- 3.3 Multilevel Flash Cells.- References.- 4 Physical Aspects of Cell Operation and Reliability.- 4.1 Introduction.- 4.2 Electronic Properties of Carriers and MOS Structures.- 4.3 Fundamentals of Tunneling Phenomena.- 4.4 Tunneling Phenomena in MOSFETs.- 4.5 Fundamentals of Carrier Transport.- 4.6 Hot Carrier Effects in MOSFETs.- 4.7 Oxide Degradation due to High Field Stress.- 4.8 Oxide and Interface Degradation due to Hot Carrier Injection.- References.- 5 Memory Architecture and Related Issues.- 5.1 Flash Architecture: General Overview.- 5.2 Read Path: Decoding.- 5.4 Read Path: Sensing Techniques 280 5 4 1 Sensing Techniques: An Overview.- 5.5 Program Operation Circuitry.- 5 6 Erase Operation Circuitry.- 5.7 Control Logic and Embedded Algorithms.- 5 8 Redundancy and Error Correction Codes.- 6 Multilevel Flash Memories.- 6 1 Introduction.- 6.2 Array Architectures for Multilevel Flash Memories.-6 3 Multilevel Sensing.- 6.4 Multilevel Programming.- 6 5 Conclusions.- References.- 7 Flash Memory Reliability.- 7 1 Introduction.- 7.2 Memory Array Vt Distributions and Tunnel Oxide “Defects”.- 7.3 Main Yield and Reliability Issues.- 7.4 Testing for Reliability.- 7 5 Failure Modes Induced by Program/Erase Cycling.- 7.6 Multilevel Storage Reliability.- 7.7 Conclusion.- References.- 8 Flash Memory Testing.- 8.1 Introduction.- 8.2 Flash Testing Aspects.- 8 3 Flash Testability Tools.- 8.4 Fault Repairing.- 8.5 Production Testing.- 8.6 Test Productivity.- 8.7 Product Characterization.- 8.8 Conclusions.- References.- 9 Flash Memories: Market, Marketing and Economic Challenges.- 9.1 Introduction.- 9.2 Market Segmentations.- 9.3 Customer/Supplier Relationship.- 9.4 The Development of the Flash Market.- 9.5 Flash Memory and the “Economy”.- 9.6 Applications More in Detail.- 9.7 Conclusions.- References.