High Speed and Wide Bandwidth Delta-Sigma ADCs: Analog Circuits and Signal Processing
Autor Muhammed Bolatkale, Lucien J. Breems, Kofi A. A. Makinwaen Limba Engleză Paperback – 6 iun 2014
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Specificații
ISBN-13: 9783319058399
ISBN-10: 3319058398
Pagini: 140
Ilustrații: VI, 133 p. 89 illus., 13 illus. in color.
Dimensiuni: 155 x 235 x 13 mm
Greutate: 0.41 kg
Ediția:2014
Editura: Springer International Publishing
Colecția Springer
Seria Analog Circuits and Signal Processing
Locul publicării:Cham, Switzerland
ISBN-10: 3319058398
Pagini: 140
Ilustrații: VI, 133 p. 89 illus., 13 illus. in color.
Dimensiuni: 155 x 235 x 13 mm
Greutate: 0.41 kg
Ediția:2014
Editura: Springer International Publishing
Colecția Springer
Seria Analog Circuits and Signal Processing
Locul publicării:Cham, Switzerland
Public țintă
ResearchCuprins
Introduction.- Continuous-Time Delta-Sigma Modulator.- Continuous-Time Delta-Sigma Modulators at High Sampling Rates.- A 4GHz Continuous-Time ΔΣ ADC.- A 2GHz Continuous-Time ΔΣ ADC with Dynamic Error Correction.- Conclusions.- Appendices.
Textul de pe ultima copertă
This book describes techniques for realizing wide bandwidth (125MHz) over-sampled analog-to-digital converters (ADCs) in nanometer-CMOS processes. The authors offer a clear and complete picture of system level challenges and practical design solutions in high-speed Delta-Sigma modulators. Readers will be enabled to implement ADCs as continuous-time delta-sigma (CT∆Σ) modulators, offering simple resistive inputs, which do not require the use of power-hungry input buffers, as well as offering inherent anti-aliasing, which simplifies system integration. The authors focus on the design of high speed and wide-bandwidth ΔΣMs that make a step in bandwidth range which was previously only possible with Nyquist converters. More specifically, this book describes the stability, power efficiency, and linearity limits of ΔΣMs, aiming at a GHz sampling frequency.
• Provides overview of trends in Wide Bandwidth and High Dynamic Range analog-to-digital converters (ADCs);
• Enables the design of a wide bandwidth, high dynamic range modulator with state-of-the-art power efficiency;
• Includes introduction to Continuous-Time Delta-Sigma Modulators and its system level modeling;
• Explains issues relating to stability of Continuous-Time Delta-Sigma Modulators;
• Includes discussion of system level non-idealities in Continuous-Time Delta-Sigma Modulators;
• System level design of CT∆Σ modulators at GHz sampling frequencies;
• Practical implementation details of high speed CT∆Σ ADCs;
• Overview of static and dynamic error correction techniques in ∆Σ ADCs;
• Dynamic error correction techniques that are suitable for high speed CT∆Σ ADCs.
• Provides overview of trends in Wide Bandwidth and High Dynamic Range analog-to-digital converters (ADCs);
• Enables the design of a wide bandwidth, high dynamic range modulator with state-of-the-art power efficiency;
• Includes introduction to Continuous-Time Delta-Sigma Modulators and its system level modeling;
• Explains issues relating to stability of Continuous-Time Delta-Sigma Modulators;
• Includes discussion of system level non-idealities in Continuous-Time Delta-Sigma Modulators;
• System level design of CT∆Σ modulators at GHz sampling frequencies;
• Practical implementation details of high speed CT∆Σ ADCs;
• Overview of static and dynamic error correction techniques in ∆Σ ADCs;
• Dynamic error correction techniques that are suitable for high speed CT∆Σ ADCs.
Caracteristici
Provides overview of trends in Wide Bandwidth and High Dynamic Range analog-to-digital converters (ADCs) Enables the design of a wide bandwidth, high dynamic range modulator with state-of-the-art power efficiency Includes introduction to Continuous-Time Delta-Sigma Modulators and its system level modeling Explains issues relating to stability of Continuous-Time Delta-Sigma Modulators Includes discussion of system level non-idealities in Continuous-Time Delta-Sigma Modulators System level design of CT?S modulators at GHz sampling frequencies Practical implementation details of high speed CT?S ADCs Overview of static and dynamic error correction techniques in ?S ADCs Dynamic error correction techniques that are suitable for high speed CT?S ADCs Includes supplementary material: sn.pub/extras