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Noise Coupling in System-on-Chip de Thomas Noulis

Noise Coupling in System-on-Chip: Devices, Circuits, and Systems

Editat de Thomas Noulis
en Limba Engleză Hardback – 27 dec 2017
Noise Coupling is the root-cause of the majority of Systems on Chip (SoC) product fails. The book discusses a breakthrough substrate coupling analysis flow and modelling toolset, addressing the needs of the design community. The flow provides capability to analyze noise components, propagating through the substrate, the parasitic interconnects and the package. Using this book, the reader can analyze and avoid complex noise coupling that degrades RF and mixed signal design performance, while reducing the need for conservative design practices. With chapters written by leading international experts in the field, novel methodologies are provided to identify noise coupling in silicon. It additionally features case studies that can be found in any modern CMOS SoC product for mobile communications, automotive applications and readout front ends.
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Specificații

ISBN-13: 9781498796774
ISBN-10: 149879677X
Pagini: 518
Ilustrații: 50 Line drawings, color; 215 Line drawings, black and white; 27 Halftones, color; 25 Halftones, black and white; 59 Tables, black and white
Dimensiuni: 156 x 234 x 30 mm
Greutate: 1 kg
Ediția:1
Editura: CRC Press
Colecția CRC Press
Seria Devices, Circuits, and Systems

Cuprins

System on Chip Substrate Crosstalk Modeling and Simulation Flow. Substrate Induced Signal Integrity in 2D and 3D Ics. TSV-to-Substrate Noise Coupling in 3-D Systems. 3-D Interconnects with IC’s Stack Global Electrical Context Consideration. Modeling of On-Chip Power Distribution Network. Printed Circuit Board Integration of SoC Packages and Signal Integrity Issues at Board Level. Modeling and Characterization of TSV-Induced Noise Coupling. Layout strategies for substrate crosstalk reduction in low cost CMOS processes. Wireless Communications System on Chip substrate noise real time sensing. System-on-Chip Substrate Crosstalk Measurement Techniques. IC Floorplanning Based on Thermal Interactions. A Unified Method for Calculating Parasitic Capacitive and Resistive Coupling in VLSI Circuits. Coupling through substrate for millimeter wave frequencies. Paradigm Shift of On-Chip Interconnects from Electrical to Optical. Electro-Thermal Considerations dedicated to 3-D Integration; Noise Coupling.

Recenzii

"This is one of the most modern books related on the noise coupling in modern Systems on Chip (SoC) design. It addresses the state of the art in the SoC design, covering a wide range of topics, including novel methodologies to identify noise coupling in silicon, interconnect and package helping locate potential noise issues, both before tape‐out and even earlier in the design process. The coupling mechanisms are addressed from silicon device level to package and printed circuit board level and from the kHz region until the mm Wave frequency region. Special focus is provided in 3D integration and on Through Silicon Vias coupling mechanisms. In addition, emerging coupling topics are addressed such as thermal and optical interconnects performance, power delivery networks, electro-thermal considerations onto 3D integration and 3D floor planning based on thermal interactions.
A strong point of the book is that it has been written by a mixture of industrial experts and academic professors and researchers, providing in-depth theoretical background and discussion of the most important practical aspects. Therefore, this book will be a powerful tool for designers involved with high performance SoC design in both 2D and 3D ICs. Using this book, we able to utilize innovative coupling analysis flow and modeling, addressing all related needs, to analyze noise components, propagating not just through the substrate, but also through the parasitic interconnect and package and to identify substrate coupling noise contributors, levels and transfer functions."
— Costas Psychalinos, University of Patras, Greece
 
"This book addresses noise coupling in integrated systems, which is a topic mostly widespread in industrial developments…This book could contribute to developing a widespread culture about how to deal with noise coupling in modern integrated systems."
—Domenico Zito, Aarhus University, Denmark

Descriere

The book presents information written by international experts in the field of Systems on Chip (SoC) Coupling, including substrate and interconnect magnetic crosstalk, 2D and 3D circuits noise coupling, and TSV and simulation. It enables the reader to analyze crosstalk noise propagating through the parasitics interconnect and package and the PCB.