Spacer Engineered FinFET Architectures: High-Performance Digital Circuit Applications
Autor Sudeb Dasgupta, Brajesh Kumar Kaushik, Pankaj Kumar Palen Limba Engleză Paperback – 30 iun 2020
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Specificații
ISBN-13: 9780367573553
ISBN-10: 0367573555
Pagini: 154
Dimensiuni: 156 x 234 mm
Greutate: 0.45 kg
Ediția:1
Editura: CRC Press
Colecția CRC Press
ISBN-10: 0367573555
Pagini: 154
Dimensiuni: 156 x 234 mm
Greutate: 0.45 kg
Ediția:1
Editura: CRC Press
Colecția CRC Press
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Cuprins
Preface
About the Authors
Chapter 1 ◾ Introduction to Nanoelectronics
Chapter 2 ◾ Tri-Gate FinFET Technology and Its Advancement
Chapter 3 ◾ Dual-k Spacer Device Architecture and Its Electrostatics
Chapter 4 ◾ Capacitive Analysis and Dual-k FinFET-Based Digital Circuit Design
Chapter 5 ◾ Design Metric Improvement of a Dual-k–Based SRAM Cell
Chapter 6 ◾ Statistical Variability and Sensitivity Analysis
INDEX
About the Authors
Chapter 1 ◾ Introduction to Nanoelectronics
Chapter 2 ◾ Tri-Gate FinFET Technology and Its Advancement
Chapter 3 ◾ Dual-k Spacer Device Architecture and Its Electrostatics
Chapter 4 ◾ Capacitive Analysis and Dual-k FinFET-Based Digital Circuit Design
Chapter 5 ◾ Design Metric Improvement of a Dual-k–Based SRAM Cell
Chapter 6 ◾ Statistical Variability and Sensitivity Analysis
INDEX
Notă biografică
Sudeb Dasgupta, Brajesh Kumar Kaushik, Pankaj Kumar Pal
Descriere
This book focusses on the spacer engineering aspects of novel MOS-based device–circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.