Analog Circuit Design: Volt Electronics; Mixed-Mode Systems; Low-Noise and RF Power Amplifiers for Telecommunication
Editat de Johan Huijsing, Rudy J. van de Plassche, Willy M.C. Sansenen Limba Engleză Paperback – 2 dec 2010
Toate formatele și edițiile | Preț | Express |
---|---|---|
Paperback (8) | 921.86 lei 6-8 săpt. | |
Springer Us – 3 dec 2010 | 921.86 lei 6-8 săpt. | |
Springer Us – 2 dec 2010 | 923.08 lei 6-8 săpt. | |
Springer Us – 2 dec 2010 | 923.24 lei 6-8 săpt. | |
Springer Us – 7 dec 2010 | 923.69 lei 6-8 săpt. | |
Springer Us – 7 dec 2010 | 923.69 lei 6-8 săpt. | |
Springer Us – 7 dec 2010 | 1185.38 lei 6-8 săpt. | |
Springer Us – 6 dec 2010 | 1187.20 lei 6-8 săpt. | |
Springer Us – 27 sep 2011 | 1346.33 lei 6-8 săpt. | |
Hardback (8) | 927.97 lei 6-8 săpt. | |
Springer Us – 30 sep 2000 | 927.97 lei 6-8 săpt. | |
Springer Us – 31 dec 1995 | 927.97 lei 6-8 săpt. | |
Springer Us – 31 oct 1999 | 928.58 lei 6-8 săpt. | |
Springer Us – 30 noi 1997 | 929.52 lei 6-8 săpt. | |
Springer Us – 31 dec 1998 | 930.44 lei 6-8 săpt. | |
Springer Us – 31 ian 1994 | 1189.49 lei 6-8 săpt. | |
Springer Us – 31 oct 1996 | 1192.28 lei 6-8 săpt. | |
Springer Us – 29 noi 1994 | 1193.19 lei 6-8 săpt. |
Preț: 923.24 lei
Preț vechi: 1125.90 lei
-18% Nou
Puncte Express: 1385
Preț estimativ în valută:
176.68€ • 185.82$ • 147.62£
176.68€ • 185.82$ • 147.62£
Carte tipărită la comandă
Livrare economică 08-22 ianuarie 25
Preluare comenzi: 021 569.72.76
Specificații
ISBN-13: 9781441950710
ISBN-10: 1441950710
Pagini: 424
Ilustrații: VIII, 420 p.
Dimensiuni: 155 x 235 x 22 mm
Greutate: 0.59 kg
Ediția:Softcover reprint of hardcover 1st ed. 1999
Editura: Springer Us
Colecția Springer
Locul publicării:New York, NY, United States
ISBN-10: 1441950710
Pagini: 424
Ilustrații: VIII, 420 p.
Dimensiuni: 155 x 235 x 22 mm
Greutate: 0.59 kg
Ediția:Softcover reprint of hardcover 1st ed. 1999
Editura: Springer Us
Colecția Springer
Locul publicării:New York, NY, United States
Public țintă
ResearchCuprins
I: 1-Volt Electronics, Introduction.- Dynamic Translinear Circuits.- 1-V Log-Domain Filters.- 1V switched-capacitor filters.- 1V ?? A/D Converters.- 1-Volt RF Circuit Design for Pagers.- DC/DC Conversion, the key to low power consumption.- II: Design and implementation of Mixed Modes Systems, Introduction.- Substrate Bounce in Mixed-Mode CMOS ICs.- Technology Impacts on Substrate Noise.- Design Techniques to Reduce Substrate Noise.- 1.2 Gb/s CML Transceiver with 1M CMOS ATM/SDH Processor in a BICMOS Monochip.- Modeling Noise Coupling in Mixed-Signal/RF ICs.- Top-Down Design of Mixed-Mode Systems: Challenges and Solutions.- III — Low-noise and RF power Amplifies for the communication, Introduction.- The Design of Narrowband CMOS RF Low-Noise Amplifiers.- Design of Broadband Low-Noise Amplifiers in Deep-Submicron CMOS Technologies.- Put your power into SOA LNAs!.- Radio Transceiver Circuits in Silicon Germanium.- Modeling for Si-Bipolar Power Amplifiers.- Design Considerations for GaAs MESFET RF Power Amplifiers.
Recenzii
`The authors are to be complimented for collecting, into a single reference, a lot of interesting information related to the above mentioned topics, particularly useful for data-acquisition system designers, RF engineers, and others.'
Microelectronics Journal 29 (1998) 1039-1046
Microelectronics Journal 29 (1998) 1039-1046
Descriere
Descriere de la o altă ediție sau format:
The realization of signal sampling and quantization at high sample rates with low power dissipation is an important goal in many applications, includ ing portable video devices such as camcorders, personal communication devices such as wireless LAN transceivers, in the read channels of magnetic storage devices using digital data detection, and many others. This paper describes architecture and circuit approaches for the design of high-speed, low-power pipeline analog-to-digital converters in CMOS. Here the term high speed is taken to imply sampling rates above 1 Mhz. In the first section the dif ferent conversion techniques applicable in this range of sample rates is dis cussed. Following that the particular problems associated with power minimization in video-rate pipeline ADCs is discussed. These include optimi zation of capacitor sizes, design of low-voltage transmission gates, and opti mization of switched capacitor gain blocks and operational amplifiers for minimum power dissipation. As an example of the application of these tech niques, the design of a power-optimized lO-bit pipeline AID converter (ADC) that achieves =1. 67 mW per MS/s of sampling rate from 1 MS/s to 20 MS/s is described. 2. Techniques for CMOS Video-Rate AID Conversion Analog-to-digital conversion techniques can be categorized in many ways. One convenient means of comparing techniques is to examine the number of "analog clock cycles" required to produce one effective output sample of the signal being quantized.
The realization of signal sampling and quantization at high sample rates with low power dissipation is an important goal in many applications, includ ing portable video devices such as camcorders, personal communication devices such as wireless LAN transceivers, in the read channels of magnetic storage devices using digital data detection, and many others. This paper describes architecture and circuit approaches for the design of high-speed, low-power pipeline analog-to-digital converters in CMOS. Here the term high speed is taken to imply sampling rates above 1 Mhz. In the first section the dif ferent conversion techniques applicable in this range of sample rates is dis cussed. Following that the particular problems associated with power minimization in video-rate pipeline ADCs is discussed. These include optimi zation of capacitor sizes, design of low-voltage transmission gates, and opti mization of switched capacitor gain blocks and operational amplifiers for minimum power dissipation. As an example of the application of these tech niques, the design of a power-optimized lO-bit pipeline AID converter (ADC) that achieves =1. 67 mW per MS/s of sampling rate from 1 MS/s to 20 MS/s is described. 2. Techniques for CMOS Video-Rate AID Conversion Analog-to-digital conversion techniques can be categorized in many ways. One convenient means of comparing techniques is to examine the number of "analog clock cycles" required to produce one effective output sample of the signal being quantized.