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Functional Design Errors in Digital Circuits: Diagnosis Correction and Repair: Lecture Notes in Electrical Engineering, cartea 32

Autor Kai-hui Chang, Igor L. Markov, Valeria Bertacco
en Limba Engleză Hardback – 10 dec 2008
Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Level (RTL) all the way to the silicon die. In particular, this book describes: (1) techniques for bug trace minimization that simplify debugging; (2) an RTL error diagnosis method that identifies the root cause of errors directly; (3) a counterexample-guided error-repair framework to automatically fix errors in gate-level and RTL designs; (4) a symmetry-based rewiring technology for fixing electrical errors; (5) an incremental verification system for physical synthesis; and (6) an integrated framework for post-silicon debugging and layout repair. The solutions provided in this book can greatly reduce debugging effort, enhance design quality, and ultimately enable the design and manufacture of more reliable electronic devices.
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Specificații

ISBN-13: 9781402093647
ISBN-10: 1402093640
Pagini: 228
Ilustrații: XXIV, 200 p.
Dimensiuni: 155 x 235 x 20 mm
Greutate: 0.5 kg
Ediția:2009
Editura: SPRINGER NETHERLANDS
Colecția Springer
Seria Lecture Notes in Electrical Engineering

Locul publicării:Dordrecht, Netherlands

Public țintă

Research

Cuprins

Background and Prior Art.- Current Landscape in Design and Verification.- Finding Bugs and Repairing Circuits.- FogClear Methodologies and Theoretical Advances in Error Repair.- Circuit Design and Verification Methodologies.- Counterexample-Guided Error-Repair Framework.- Signature-Based Resynthesis Techniques.- Symmetry-Based Rewiring.- FogClear Components.- Bug Trace Minimization.- Functional Error Diagnosis and Correction.- Incremental Verification for Physical Synthesis.- Post-Silicon Debugging and Layout Repair.- Methodologies for Spare-Cell Insertion.- Conclusions.

Notă biografică

Winner of the EDAA (European Design Automation Association) Outstanding Monograph Award in the Verification section. Co-authors Bertacco and Markov are existing Springer authors

Textul de pe ultima copertă

Due to the dramatic increase in design complexity, modern circuits are often produced with functional errors. While improvements in verification allow engineers to find more errors, fixing these errors remains a manual and challenging task. Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Level (RTL) all the way to the silicon die. In particular, this book describes: (1) techniques for bug trace minimization that simplify debugging; (2) an RTL error diagnosis method that identifies the root cause of errors directly; (3) a counterexample-guided error-repair framework to automatically fix errors in gate-level and RTL designs; (4) a symmetry-based rewiring technology for fixing electrical errors; (5) an incremental verification system for physical synthesis; and (6) an integrated framework for post-silicon debugging and layout repair. In addition, Functional Design Errors in Digital Circuits Diagnosis describes a comprehensive evaluation of spare-cell insertion methods. The solutions provided in this book can greatly reduce debugging effort, enhance design quality, and ultimately enable the design and manufacture of more reliable electronic devices.

Caracteristici

Coverage of novel techniques to automate IC debugging, a subject rarely covered in other books Comprehensive scope and solutions: from RTL to post-silicon debugging The innovative techniques covered in this book are recent and have been featured by MIT Technology Review, EE Times, SCD Source, IEEE Computer, and other sources First empirical comparison of several methods for spare-cell insertion A variety of examples and figures to illustrate key concepts and algorithms