VLSI Physical Design: From Graph Partitioning to Timing Closure
Autor Andrew B. Kahng, Jens Lienig, Igor L. Markov, Jin Huen Limba Engleză Paperback – 15 oct 2014
Design and optimization of integrated circuits are essential to the creation of new semiconductor chips, and physical optimizations are becoming more prominent as a result of semiconductor scaling. Modern chip design has become so complex that it is largely performed by specialized software, which is frequently updated to address advances in semiconductor technologies and increased problem complexities. A user of such software needs a high-level understanding of the underlying mathematical models and algorithms. On the other hand, a developer of such software must have a keen understanding of computer science aspects, including algorithmic performance bottlenecks and how various algorithms operate and interact.
"VLSI Physical Design: From Graph Partitioning to Timing Closure"
introduces and compares algorithms that are used during the physical design phase of integrated-circuit design, wherein a geometric chip layout is produced starting from an abstract circuit design. The emphasis is on essential and fundamental techniques, ranging from hypergraph partitioning and circuit placement to timing closure.
"VLSI Physical Design: From Graph Partitioning to Timing Closure"
introduces and compares algorithms that are used during the physical design phase of integrated-circuit design, wherein a geometric chip layout is produced starting from an abstract circuit design. The emphasis is on essential and fundamental techniques, ranging from hypergraph partitioning and circuit placement to timing closure.
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| Springer International Publishing – 17 iun 2023 | 362.88 lei 22-36 zile | +21.57 lei 5-11 zile |
| SPRINGER NETHERLANDS – 15 oct 2014 | 518.14 lei 43-57 zile | |
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Specificații
ISBN-13: 9789400790209
ISBN-10: 9400790201
Pagini: 324
Ilustrații: XI, 310 p.
Dimensiuni: 155 x 235 x 17 mm
Greutate: 0.45 kg
Ediția:2011
Editura: SPRINGER NETHERLANDS
Colecția Springer
Locul publicării:Dordrecht, Netherlands
ISBN-10: 9400790201
Pagini: 324
Ilustrații: XI, 310 p.
Dimensiuni: 155 x 235 x 17 mm
Greutate: 0.45 kg
Ediția:2011
Editura: SPRINGER NETHERLANDS
Colecția Springer
Locul publicării:Dordrecht, Netherlands
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Public țintă
ResearchCuprins
1 Introduction. 2 Netlist and System Partitioning. 3 Chip Planning. 4 Global and Detailed Placement. 5 Global Routing. 6 Detailed Routing. 7 Specialized Routing. 8 Timing Closure. A Solutions to Chapter Exercises. B Example CMOS Cell Layouts.
Recenzii
Notă biografică
Andrew B. Kahng is Professor of CSE and ECE at UC San Diego, where he holds the endowed chair in High-Performance Computing. He has served as visiting scientist at Cadence (1995-1997) and as founder, chairman and CTO at Blaze DFM (2004-2006).
Jens Lienig is Professor of Electrical Engineering at TU Dresden. He is also the director of the Institute of Electromechanical and Electronic Design at TUD. He has worked as project manager at Tanner Research, Inc. (1996-1999) and Robert Bosch GmbH (1999-2002).
Igor L. Markov is a Professor of Electrical Engineering and Computer Science at the University of Michigan. He has worked at Google (2014-2017) and has been with Facebook since 2018.
Jin Hu was a PhD student at the Computer Science and Engineering (CSE) Division at the University of Michigan. Afterwards, she has been with IBM Corp. (2013-2017) and Bloomberg L.P.
Jens Lienig is Professor of Electrical Engineering at TU Dresden. He is also the director of the Institute of Electromechanical and Electronic Design at TUD. He has worked as project manager at Tanner Research, Inc. (1996-1999) and Robert Bosch GmbH (1999-2002).
Igor L. Markov is a Professor of Electrical Engineering and Computer Science at the University of Michigan. He has worked at Google (2014-2017) and has been with Facebook since 2018.
Jin Hu was a PhD student at the Computer Science and Engineering (CSE) Division at the University of Michigan. Afterwards, she has been with IBM Corp. (2013-2017) and Bloomberg L.P.
Textul de pe ultima copertă
Design and optimization of integrated circuits are essential to the creation of new semiconductor chips, and physical optimizations are becoming more prominent as a result of semiconductor scaling. Modern chip design has become so complex that it is largely performed by specialized software, which is frequently updated to address advances in semiconductor technologies and increased problem complexities. A user of such software needs a high-level understanding of the underlying mathematical models and algorithms. On the other hand, a developer of such software must have a keen understanding of computer science aspects, including algorithmic performance bottlenecks and how various algorithms operate and interact.
"VLSI Physical Design: From Graph Partitioning to Timing Closure"
introduces and compares algorithms that are used during the physical design phase of integrated-circuit design,wherein a geometric chip layout is produced starting from an abstract circuit design. The emphasis is on essential and fundamental techniques, ranging from hypergraph partitioning and circuit placement to timing closure.
For Slides and Other Information: https://www.ifte.de/books/eda/index.html
"VLSI Physical Design: From Graph Partitioning to Timing Closure"
introduces and compares algorithms that are used during the physical design phase of integrated-circuit design,wherein a geometric chip layout is produced starting from an abstract circuit design. The emphasis is on essential and fundamental techniques, ranging from hypergraph partitioning and circuit placement to timing closure.
For Slides and Other Information: https://www.ifte.de/books/eda/index.html
Caracteristici
Comprehensive coverage of physical design of integrated circuits, PCBs and MCMs, with emphasis on practical algorithms and methodologies A chapter on timing closure that includes a discussion of design flows Detailed illustrations of key concepts, numerous examples Brief surveys of recent research results with up-to-date references for further reading Accessible to beginners and students Problem sets for students, with solutions Includes supplementary material: sn.pub/extras