Hardware Description Languages and their Applications: Specification, modelling, verification and synthesis of microelectronic systems: IFIP Advances in Information and Communication Technology
Editat de Carlos Delgado Kloos, Eduard Cernyen Limba Engleză Hardback – 30 apr 1997
Toate formatele și edițiile | Preț | Express |
---|---|---|
Paperback (1) | 970.22 lei 43-57 zile | |
Springer Us – 8 ian 2013 | 970.22 lei 43-57 zile | |
Hardback (1) | 976.52 lei 43-57 zile | |
Springer Us – 30 apr 1997 | 976.52 lei 43-57 zile |
Din seria IFIP Advances in Information and Communication Technology
- 20% Preț: 170.51 lei
- 20% Preț: 615.74 lei
- 20% Preț: 333.46 lei
- Preț: 389.39 lei
- 20% Preț: 329.26 lei
- 20% Preț: 334.10 lei
- 20% Preț: 503.41 lei
- 17% Preț: 523.40 lei
- 20% Preț: 502.06 lei
- 17% Preț: 488.96 lei
- 20% Preț: 501.04 lei
- 20% Preț: 403.20 lei
- 20% Preț: 1162.12 lei
- 20% Preț: 1262.11 lei
- 18% Preț: 1202.31 lei
- 20% Preț: 1255.99 lei
- 18% Preț: 1199.35 lei
- 18% Preț: 933.71 lei
- 18% Preț: 933.88 lei
- 18% Preț: 925.84 lei
- 18% Preț: 929.07 lei
- 15% Preț: 632.42 lei
- 18% Preț: 940.66 lei
- 20% Preț: 1261.97 lei
- 20% Preț: 978.45 lei
- 18% Preț: 930.00 lei
- 20% Preț: 1257.76 lei
- 20% Preț: 975.71 lei
- 15% Preț: 632.73 lei
- 20% Preț: 1250.82 lei
- 20% Preț: 1883.92 lei
- 20% Preț: 1259.86 lei
- 18% Preț: 937.29 lei
- 18% Preț: 927.55 lei
- 18% Preț: 1199.52 lei
- 20% Preț: 1251.96 lei
- 18% Preț: 933.71 lei
- 18% Preț: 928.77 lei
- 20% Preț: 1266.32 lei
- 18% Preț: 936.81 lei
- 20% Preț: 632.73 lei
- 18% Preț: 1210.19 lei
- 20% Preț: 1258.40 lei
- 18% Preț: 1206.05 lei
- 20% Preț: 972.96 lei
- 20% Preț: 1262.79 lei
- 20% Preț: 967.16 lei
- 18% Preț: 1796.10 lei
- 20% Preț: 1265.99 lei
Preț: 976.52 lei
Preț vechi: 1220.66 lei
-20% Nou
Puncte Express: 1465
Preț estimativ în valută:
186.89€ • 194.13$ • 155.24£
186.89€ • 194.13$ • 155.24£
Carte tipărită la comandă
Livrare economică 03-17 februarie 25
Preluare comenzi: 021 569.72.76
Specificații
ISBN-13: 9780412788109
ISBN-10: 0412788101
Pagini: 350
Ilustrații: X, 350 p.
Dimensiuni: 155 x 235 x 21 mm
Greutate: 0.69 kg
Ediția:1997
Editura: Springer Us
Colecția Springer
Seria IFIP Advances in Information and Communication Technology
Locul publicării:New York, NY, United States
ISBN-10: 0412788101
Pagini: 350
Ilustrații: X, 350 p.
Dimensiuni: 155 x 235 x 21 mm
Greutate: 0.69 kg
Ediția:1997
Editura: Springer Us
Colecția Springer
Seria IFIP Advances in Information and Communication Technology
Locul publicării:New York, NY, United States
Public țintă
ResearchCuprins
1 Synchronous languages for hardware and software reactive systems.- 2 Towards a complete design method for embedded systems using Predicate/Transition-Nets.- 3 Simplifying data operations for formal verification.- 4 CTL and equivalent sublanguages of CTL.- 5 Verifying linear temporal properties of data intensive controllers using finite instantiations.- 6 A high-level language for programming complex temporal behaviors and its translation into synchronous circuits (poster abstract).- 7 System-level hardware design with ?-charts (poster abstract).- 8 Interface synthesis in embedded hardware-software systems (poster abstract).- 9 TripleS-a formal validation environment for functional specifications (poster abstract).- 10 SOFHIA: a CAD environment to design digital control systems (poster abstract).- 11 Compiling the language BALSA to delay insensitive hardware (poster abstract).- 12 High-level synthesis of structured data paths (poster abstract).- 13 Characterizing a portable subset of behavioural VHDL-93.- 14 Algebra of communicating timing charts for describing and verifying hardware interfaces.- 15 A formal proof of absence of deadlock for any acyclic network of PCI buses.- 16 Behavioural modelling of sampled-data with HDL-A and ABSynth.- 17 Hardware description languages in practical design flows.- 18 VHDL generation from SDL specification.- 19 Exploiting isomorphism for speeding up instance-binding in an integrated scheduling allocation and assignment approach to architectural synthesis.- 20 Verification of large systems in silicon (special talk).- 21 The Shall Design test Development model for hardware systems.- 22 Modular operational semantic specification of transport triggered architectures.- 23 The world of I/O: a rich application area for formal methods(invited talk).- 24 Abstract modelling of asynchronous micropipeline systems using Rainbow.- 25 A new partial order reduction algorithm for concurrent system verification (short talk).- 26 VHDL power simulator: power analysis at gate level.- 27 Object oriented extensions to VHDL. the LaMI proposal.- Index of contributors.- Keyword index.