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Noise-Shaping All-Digital Phase-Locked Loops: Modeling, Simulation, Analysis and Design de Francesco Brandonisio

Noise-Shaping All-Digital Phase-Locked Loops: Modeling, Simulation, Analysis and Design: Analog Circuits and Signal Processing

Autor Francesco Brandonisio, Michael Peter Kennedy
en Limba Engleză Hardback – 8 ian 2014
This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book.
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Specificații

ISBN-13: 9783319036588
ISBN-10: 3319036580
Pagini: 192
Ilustrații: XIII, 177 p. 145 illus., 79 illus. in color.
Dimensiuni: 155 x 235 x 16 mm
Greutate: 0.41 kg
Ediția:2014
Editura: Springer International Publishing
Colecția Springer
Seria Analog Circuits and Signal Processing

Locul publicării:Cham, Switzerland

Public țintă

Research

Cuprins

Introduction.- Phase Digitization in All-Digital PLLs.- A Unifying Framework for TDC Architectures.- Analytical Predictions of Phase Noise in ADPLLs.- Advantages of Noise Shaping and Dither.- Efficient Modeling and Simulation of Accumulator-Based ADPLLs.- Modelling and Estimating Phase Noise with Matlab.

Textul de pe ultima copertă

This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book.
 
• Discusses in detail a wide range of all-digital phase-locked loops architectures;
• Presents a unified framework in which to model time-to-digital converters for ADPLLs;
• Explains a procedure to predict and simulate phase noise in oscillators and ADPLLs;
• Describes an efficient approach to model ADPLLS;
• Includes Matlab code to reproduce the examples in the book.

Caracteristici

Discusses in detail a wide range of all-digital phase-locked loops architectures Presents a unified framework in which to model time-to-digital converters for ADPLLs Explains a procedure to predict and simulate phase noise in oscillators and ADPLLs Describes an efficient approach to model ADPLLS Includes Simulink and Matlab code to reproduce the examples in the book Includes supplementary material: sn.pub/extras