Resilient Architecture Design for Voltage Variation: Synthesis Lectures on Computer Architecture
Autor Vijay Janapa Reddi, Meeta Sharma Guptaen Limba Engleză Paperback – 30 mai 2013
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Specificații
ISBN-13: 9783031006111
ISBN-10: 3031006119
Ilustrații: XVI, 124 p.
Dimensiuni: 191 x 235 mm
Greutate: 0.25 kg
Editura: Springer International Publishing
Colecția Springer
Seria Synthesis Lectures on Computer Architecture
Locul publicării:Cham, Switzerland
ISBN-10: 3031006119
Ilustrații: XVI, 124 p.
Dimensiuni: 191 x 235 mm
Greutate: 0.25 kg
Editura: Springer International Publishing
Colecția Springer
Seria Synthesis Lectures on Computer Architecture
Locul publicării:Cham, Switzerland
Cuprins
Introduction.- Modeling Voltage Variation.- Understanding the Characteristics of Voltage Variation.- Traditional Solutions and Emerging Solution Forecast.- Allowing and Tolerating Voltage Emergencies.- Predicting and Avoiding Voltage Emergencies.- Eliminiating Recurring Voltage Emergencies.- Future Directions on Resiliency.
Notă biografică
Vijay Janapa Reddi is an Assistant Professor in the Department of Electrical and Computer Engineering at The University of Texas in Austin. His research interests are in the area of computer systems,focusing on the interactions between hardware and software.He explores new opportunities and synergies for cross-layer solutions that improve processor- and system-level power, performance and reliability.He has co-authored over 30 papers in these areas, and has papers selected as IEEE Micro Top Picks and received Best Paper Awards. Dr. Janapa Reddi has also worked in the computer industry, specifically focusing on processor architecture and compiler aspects at companies such as Intel, VMware, AMD Research, and Microsoft Research. One of his most significant contributions to the community is the Pin dynamic compiler that he co-authored on a 4-year stint at Intel. Pin is widely used in academia and industry for program introspection and analysis. Dr. Janapa Reddi received his Ph.D. in Computer Science from Harvard University. He has a M.S. degree from the Department of Electrical and Computer Engineering at the University of Colorado at Boulder.His B.S.degree is from the Computer Engineering department at Santa Clara University.
Meeta S. Gupta is a Research Staff Member in the Reliability and Power-Aware Microarchitecture department at IBM T. J. Watson Research Center. Her research interests include high-performance computing, reliability, and power-aware computer architecture design.Dr.Gupta is involved in general areas of processor reliability, inductive noise, and Exascale systems. Microarchitectural techniques for reliability enhancement have also been part of her research focus. Dr. Gupta received her Ph.D. degree in Electrical and Computer Engineering from Harvard University. She received a Master's in EE from the University of Southern California, Los Angeles, and a Bachelor's degree in Electrical Engineering from the Indian Institute of Technology, Delhi. Dr.Gupta also held positions in Advanced Mobile Networking Group at Lucent Bell Labs and in the High-Performance Computing group at IBM India Research Labs, Delhi. Dr. Gupta was the recipient of the IBM Ph.D. Fellowship.