Creating Assertion-Based IP: Integrated Circuits and Systems
Autor Harry D. Foster, Adam C. Krolniken Limba Engleză Hardback – 26 noi 2007
The guiding principles promoted in this book when creating an assertion-based IP monitor are:
- modularity—assertion-based IP should have a clear separation between detection and action
- clarity—assertion-based IP should be written initially focusing on capturing intent (versus optimizations)
From the Foreword:
Creating Assertion-Based IP "…reduces to process the creation of one of the most valuable kinds of VIP: assertion-based VIP…This book will serve as a valuable reference for years to come."
Andrew Piziali, Sr. Design Verification Engineer
Co-Author, ESL Design and Verification: A Prescription for Electronic System Level Methodology
Author, Functional Verification Coverage Measurement and Analysis
Toate formatele și edițiile | Preț | Express |
---|---|---|
Paperback (1) | 678.79 lei 6-8 săpt. | |
Springer Us – 19 noi 2010 | 678.79 lei 6-8 săpt. | |
Hardback (1) | 926.46 lei 6-8 săpt. | |
Springer Us – 26 noi 2007 | 926.46 lei 6-8 săpt. |
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Specificații
ISBN-13: 9780387366418
ISBN-10: 0387366415
Pagini: 313
Ilustrații: XVIII, 318 p.
Dimensiuni: 155 x 235 x 26 mm
Greutate: 0.69 kg
Ediția:2008
Editura: Springer Us
Colecția Springer
Seria Integrated Circuits and Systems
Locul publicării:New York, NY, United States
ISBN-10: 0387366415
Pagini: 313
Ilustrații: XVIII, 318 p.
Dimensiuni: 155 x 235 x 26 mm
Greutate: 0.69 kg
Ediția:2008
Editura: Springer Us
Colecția Springer
Seria Integrated Circuits and Systems
Locul publicării:New York, NY, United States
Public țintă
Professional/practitionerCuprins
Definitions and Terminology.- The Process.- Bus-Based Design Example.- Interfaces.- Arbiters.- Controllers.- Datapath.
Textul de pe ultima copertă
Assertion-based IP is much more than a comprehensive set of related assertions. It is a full-fledged reusable and configurable transaction-level verification component, which is used to detect both interesting and incorrect behaviors. Upon detecting interesting or incorrect behavior, the assertion-based IP alerts other verification components within a simulation environment, which are responsible for taking appropriate action. The focus of this book is to bring the assertion discussion up to a higher level and introduce a process for creating effective, reusable, assertion-based IP, which easily integrates with the user’s existing verification environment, in other words the testbench infrastructure.
The guiding principles promoted in this book when creating an assertion-based IP monitor are:
From the Foreword:
Creating Assertion-Based IP "…reduces to process the creation of one of the most valuable kinds of VIP: assertion-based VIP…This book will serve as a valuable reference for years to come."
Andrew Piziali, Sr. Design Verification Engineer
Co-Author, ESL Design and Verification: A Prescription for Electronic System Level Methodology
Author, Functional Verification Coverage Measurement and Analysis
The guiding principles promoted in this book when creating an assertion-based IP monitor are:
- modularity—assertion-based IP should have a clear separation between detection and action
- clarity—assertion-based IP should be written initially focusing on capturing intent (versus optimizations)
From the Foreword:
Creating Assertion-Based IP "…reduces to process the creation of one of the most valuable kinds of VIP: assertion-based VIP…This book will serve as a valuable reference for years to come."
Andrew Piziali, Sr. Design Verification Engineer
Co-Author, ESL Design and Verification: A Prescription for Electronic System Level Methodology
Author, Functional Verification Coverage Measurement and Analysis
Caracteristici
Demonstrates a systematic process for formal specification and formal testplanning Demonstrates effective use of assertions languages beyond the traditional language construct discussions No existing books that talk about either formal testplanning or guidelines for creating assertion-based verification IP