Design for Manufacturability and Yield for Nano-Scale CMOS: Integrated Circuits and Systems
Autor Charles Chiang, Jamil Kawaen Limba Engleză Paperback – 22 noi 2010
Toate formatele și edițiile | Preț | Express |
---|---|---|
Paperback (1) | 627.11 lei 6-8 săpt. | |
SPRINGER NETHERLANDS – 22 noi 2010 | 627.11 lei 6-8 săpt. | |
Hardback (1) | 636.73 lei 6-8 săpt. | |
SPRINGER NETHERLANDS – 26 iul 2007 | 636.73 lei 6-8 săpt. |
Din seria Integrated Circuits and Systems
- 15% Preț: 644.92 lei
- 18% Preț: 1360.50 lei
- 15% Preț: 628.74 lei
- 18% Preț: 1188.85 lei
- 18% Preț: 935.12 lei
- 15% Preț: 637.71 lei
- 20% Preț: 968.12 lei
- 18% Preț: 932.79 lei
- 18% Preț: 931.26 lei
- 15% Preț: 682.42 lei
- 18% Preț: 930.96 lei
- 18% Preț: 934.50 lei
- 24% Preț: 805.38 lei
- 20% Preț: 977.17 lei
- 15% Preț: 621.18 lei
- 18% Preț: 930.00 lei
- 20% Preț: 630.62 lei
- 18% Preț: 1202.46 lei
- 24% Preț: 803.80 lei
- 15% Preț: 636.73 lei
- 18% Preț: 765.81 lei
- 18% Preț: 981.04 lei
- 15% Preț: 622.48 lei
- 15% Preț: 681.14 lei
- 18% Preț: 921.98 lei
- 15% Preț: 628.41 lei
- 18% Preț: 867.69 lei
- 18% Preț: 927.68 lei
- 18% Preț: 925.23 lei
- 15% Preț: 621.36 lei
- 18% Preț: 936.93 lei
- 18% Preț: 925.53 lei
- 18% Preț: 921.98 lei
- 18% Preț: 923.66 lei
- 18% Preț: 933.88 lei
- 15% Preț: 622.48 lei
- 23% Preț: 570.64 lei
- 18% Preț: 933.59 lei
Preț: 627.11 lei
Preț vechi: 737.78 lei
-15% Nou
Puncte Express: 941
Preț estimativ în valută:
120.02€ • 124.67$ • 99.69£
120.02€ • 124.67$ • 99.69£
Carte tipărită la comandă
Livrare economică 03-17 februarie 25
Preluare comenzi: 021 569.72.76
Specificații
ISBN-13: 9789048173037
ISBN-10: 9048173035
Pagini: 288
Ilustrații: XXVII, 255 p.
Dimensiuni: 155 x 235 x 15 mm
Greutate: 0.41 kg
Ediția:Softcover reprint of hardcover 1st ed. 2007
Editura: SPRINGER NETHERLANDS
Colecția Springer
Seria Integrated Circuits and Systems
Locul publicării:Dordrecht, Netherlands
ISBN-10: 9048173035
Pagini: 288
Ilustrații: XXVII, 255 p.
Dimensiuni: 155 x 235 x 15 mm
Greutate: 0.41 kg
Ediția:Softcover reprint of hardcover 1st ed. 2007
Editura: SPRINGER NETHERLANDS
Colecția Springer
Seria Integrated Circuits and Systems
Locul publicării:Dordrecht, Netherlands
Public țintă
ResearchCuprins
Random Defects.- Systematic Yield - Lithography.- Systematic Yield - Chemical Mechanical Polishing (CMP).- Variability & Parametric Yield.- Design for Yield.- Yield Prediction.- Conclusions.
Notă biografică
Dr. Charles Chiang is R&D Director of the Advanced Technology Group at Synopsys Inc. in Mountain View, CA, USA
Textul de pe ultima copertă
As we approach the 32 nm CMOS technology node the design and manufacturing communities are dealing with a lithography system that has to print circuit artifacts that are significantly less than half the wavelength of the light source used, with new materials, with tighter pitches, and higher aspect ratio metallurgies. This reality has resulted in three main manufacturability issues that have to be addressed: printability, planarization, and intra-die variability. Addressing in depth the fundamentals impacting those three issues at all the stages of the design process is not a luxury one can ignore. Manufacturability and yield are now one and the same and are no longer a fabrication, packaging, and test concerns; they are the concern of the whole IC community. Yield and manufacturability have to be designed in, and they are everybody’s responsibility.
Design for Manufacturability and Yield for Nano-Scale CMOS walks the reader through all the aspects of manufacturability and yield in a nano-CMOS process and how to address each aspect at the proper design step starting with the design and layout of standard cells and how to yield-grade libraries for critical area and lithography artifacts through place and route, CMP model based simulation and dummy-fill insertion, mask planning, simulation and manufacturing, and through statistical design and statistical timing closure of the design. It alerts the designer to the pitfalls to watch for and to the good practices that can enhance a design’s manufacturability and yield. This book is a must read book the serious practicing IC designer and an excellent primer for any graduate student intent on having a career in IC design or in EDA tool development.
Design for Manufacturability and Yield for Nano-Scale CMOS walks the reader through all the aspects of manufacturability and yield in a nano-CMOS process and how to address each aspect at the proper design step starting with the design and layout of standard cells and how to yield-grade libraries for critical area and lithography artifacts through place and route, CMP model based simulation and dummy-fill insertion, mask planning, simulation and manufacturing, and through statistical design and statistical timing closure of the design. It alerts the designer to the pitfalls to watch for and to the good practices that can enhance a design’s manufacturability and yield. This book is a must read book the serious practicing IC designer and an excellent primer for any graduate student intent on having a career in IC design or in EDA tool development.
Caracteristici
Addressing a new topic (DFM/DFY) critical at 90 nm and beyond No book available today with comprehensive coverage of this topic Book covers all CAD/CAE aspects of a SOC design flow