Introduction to Advanced System-on-Chip Test Design and Optimization: Frontiers in Electronic Testing, cartea 29
Autor Erik Larssonen Limba Engleză Hardback – 7 noi 2005
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Specificații
ISBN-13: 9781402032073
ISBN-10: 1402032072
Pagini: 408
Ilustrații: XX, 388 p.
Dimensiuni: 156 x 232 x 27 mm
Greutate: 1.09 kg
Ediția:2005
Editura: Springer Us
Colecția Springer
Seria Frontiers in Electronic Testing
Locul publicării:New York, NY, United States
ISBN-10: 1402032072
Pagini: 408
Ilustrații: XX, 388 p.
Dimensiuni: 156 x 232 x 27 mm
Greutate: 1.09 kg
Ediția:2005
Editura: Springer Us
Colecția Springer
Seria Frontiers in Electronic Testing
Locul publicării:New York, NY, United States
Public țintă
Professional/practitionerCuprins
Testing Concepts.- Design Flow.- Design for Test.- Boundary Scan.- SOC Design for Testability.- System Modeling.- Test Conflicts.- Test Power Dissipation.- Test Access Mechanism.- Test Scheduling.- SOC Test Applications.- A Reconfigurable Power-Conscious Core Wrapper and its Application to System-on-Chip Test Scheduling.- An Integrated Framework for the Design and Optimization of SOC Test Solutions.- Efficient Test Solutions for Core-Based Designs.- Core Selection in the SOC Test Design-Flow.- Defect-Aware Test Scheduling.- An Integrated Technique for Test Vector Selection and Test Scheduling under ATE Memory Depth Constraint.
Notă biografică
Dr. Erik Larsson is an assistant professor at Linköpings University in Sweden, and he is an active member of the IEEE Testing and Circuits & Systems societies
Caracteristici
System perspective to SOC test design. Overview of test problems and their modeling Test scheduling overview, extensive reference list Applicable for Master students and PhD-students working in the test field. Could also be good for researchers and professors who would like to get into the area of SOC testing, also for persons in the field who want some references Includes supplementary material: sn.pub/extras